Invention Grant
US07767506B2 Mask and manufacturing method of a semiconductor device and a thin film transistor array panel using the mask 有权
使用该掩模的半导体器件和薄膜晶体管阵列面板的掩模和制造方法

Mask and manufacturing method of a semiconductor device and a thin film transistor array panel using the mask
Abstract:
An exposure mask is provided, which includes: a light blocking opaque area blocking incident light; a translucent area; and a transparent area passing the most of incident light, wherein the translucent area generates the phase differences in the range of about −70° to about +70°.
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