Invention Grant
- Patent Title: Method for manufacturing semiconductor wafer including a strained silicon layer
- Patent Title (中): 包括应变硅层的半导体晶片的制造方法
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Application No.: US11840615Application Date: 2007-08-17
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Publication No.: US07767548B2Publication Date: 2010-08-03
- Inventor: Masaharu Ninomiya , Koji Matsumoto , Masahiko Nakamae , Masanobu Miyao , Taizoh Sadoh
- Applicant: Masaharu Ninomiya , Koji Matsumoto , Masahiko Nakamae , Masanobu Miyao , Taizoh Sadoh
- Applicant Address: JP Tokyo JP Fukuoka
- Assignee: Sumco Corporation,Kyushu University, National University Corporation
- Current Assignee: Sumco Corporation,Kyushu University, National University Corporation
- Current Assignee Address: JP Tokyo JP Fukuoka
- Agency: Greenblum & Bernstein, P.L.C.
- Main IPC: H01L21/30
- IPC: H01L21/30

Abstract:
A method for manufacturing a semiconductor wafer with a strained Si layer having sufficient tensile strain and few crystal defects, while achieving a relatively simple layered structure, is provided. The method includes the steps of: (a) forming an SiGe mixed crystal layer 12 and a first Si layer 13 in this order on the surface of a silicon wafer 11; (b) forming an SiO2 layer 16 on top of the first Si layer and/or a support wafer 14; (c) forming a layered product 17 by stacking the silicon wafer and the support wafer with the SiO2 layer being placed therebetween; (d) forming a second Si layer 18 by thinning the silicon wafer of the layered product; (e) implanting hydrogen ion and/or rare gas ion, such that ionic concentration peaks in a predetermined area; (f) subjecting the layered product to a first heat treatment; and (g) carrying out a second heat treatment following the first heat treatment, thereby relaxing the SiGe mixed crystal layer and diffusing Ge through portions of the first Si layer and the second Si layer.
Public/Granted literature
- US20090047526A1 Method for Manufacturing Semiconductor Wafer Public/Granted day:2009-02-19
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