Invention Grant
- Patent Title: Semiconductor integrated circuit device and a method of manufacturing the same
- Patent Title (中): 半导体集成电路器件及其制造方法
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Application No.: US12345917Application Date: 2008-12-30
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Publication No.: US07777346B2Publication Date: 2010-08-17
- Inventor: Kensuke Ishikawa , Tatsuyuki Saito , Masanori Miyauchi , Toshio Saito , Hiroshi Ashihara
- Applicant: Kensuke Ishikawa , Tatsuyuki Saito , Masanori Miyauchi , Toshio Saito , Hiroshi Ashihara
- Applicant Address: JP Tokyo
- Assignee: Renesas Electronics Corp.
- Current Assignee: Renesas Electronics Corp.
- Current Assignee Address: JP Tokyo
- Agency: Antonelli, Terry, Stout & Kraus LLP
- Priority: JP2001-309007 20011004
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40

Abstract:
In manufacturing a semiconductor integrated circuit device, an interconnect trench and a contact hole are formed in an interlayer insulating film formed over a first-level interconnect on a semiconductor substrate, a barrier film is formed inside of the trench and contact hole so that its film thickness increases from the center of the bottom of the hole toward the sidewalls all around the bottom of the contact hole, a copper film is formed over the barrier film, and a second-level interconnect and a connector portion (plug) are formed by polishing by CMP. In this way, the geometrically shortest pathway of an electrical current flowing from the second-level interconnect toward the first-level interconnect through a connector portion (plug) does not coincide with a thin barrier film portion which has the lowest electrical resistance, so that the current pathway can be dispersed and a concentration of electrons does not occur readily.
Public/Granted literature
- US20090115063A1 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND A METHOD OF MANUFACTURING THE SAME Public/Granted day:2009-05-07
Information query
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