发明授权
US07781827B2 Semiconductor device with a vertical MOSFET including a superlattice and related methods
有权
具有垂直MOSFET的半导体器件包括超晶格及相关方法
- 专利标题: Semiconductor device with a vertical MOSFET including a superlattice and related methods
- 专利标题(中): 具有垂直MOSFET的半导体器件包括超晶格及相关方法
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申请号: US12018260申请日: 2008-01-23
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公开(公告)号: US07781827B2公开(公告)日: 2010-08-24
- 发明人: Kalipatnam Vivek Rao
- 申请人: Kalipatnam Vivek Rao
- 申请人地址: US MA Waltham
- 专利权人: Mears Technologies, Inc.
- 当前专利权人: Mears Technologies, Inc.
- 当前专利权人地址: US MA Waltham
- 代理机构: Allen, Dyer, Doppelt, Milbrath & Gilchrist, P.A.
- 主分类号: H01L21/336
- IPC分类号: H01L21/336 ; H01L29/76 ; H01L29/80
摘要:
A semiconductor device may include at least one vertical Metal Oxide Semiconductor Field Effect Transistor (MOSFET) on a substrate. The vertical MOSFET may include at least one superlattice including a plurality of laterally stacked groups of layers transverse to the substrate. The vertical MOSFET(s) may further include a gate laterally adjacent the superlattice, and regions vertically above and below the superlattice and cooperating with the gate for causing transport of charge carriers through the superlattice in the vertical direction. Each group of layers of the superlattice may include stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. At least some atoms from opposing base semiconductor portions may be chemically bound together with the chemical bonds traversing the at least one intervening non-semiconductor monolayer.
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