发明授权
US07814469B2 Speculative multi-threading for instruction prefetch and/or trace pre-build
有权
用于指令预取和/或跟踪预构建的推测性多线程
- 专利标题： Speculative multi-threading for instruction prefetch and/or trace pre-build
- 专利标题（中）： 用于指令预取和/或跟踪预构建的推测性多线程
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申请号： US10423633申请日： 2003-04-24
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公开(公告)号： US07814469B2公开(公告)日： 2010-10-12
- 发明人: Hong Wang , Tor M. Aamodt , Pedro Marcuello , Jared W. Stark, IV , John P. Shen , Antonio González , Per Hammarlund , Gerolf F. Hoflehner , Perry H. Wang , Steve Shih-wei Liao
- 申请人： Hong Wang , Tor M. Aamodt , Pedro Marcuello , Jared W. Stark, IV , John P. Shen , Antonio González , Per Hammarlund , Gerolf F. Hoflehner , Perry H. Wang , Steve Shih-wei Liao
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 代理商 David P. McAbee
- 主分类号： G06F9/445
- IPC分类号： G06F9/445 ; G06F9/30 ; G06F9/40 ; G06F7/38 ; G06F13/28
摘要：
The latencies associated with retrieving instruction information for a main thread are decreased through the use of a simultaneous helper thread. The helper thread is a speculative prefetch thread to perform instruction prefetch and/or trace pre-build for the main thread.
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