Invention Grant
US07816962B2 Delay locked loop with improved jitter and clock delay compensating method thereof 有权
延迟锁定环路,具有改进的抖动和时钟延迟补偿方法

Delay locked loop with improved jitter and clock delay compensating method thereof
Abstract:
A delay locked loop can remove a jitter component that inevitably occurs due to feedback latency in the conventional DLL. That is, the present invention has benefit of removing the jitter component by controlling the delay lines based on the predicted data. The delay locked loop includes a pattern detecting unit for generating and storing a noise pattern by detecting inputted noise data, a pre-delay control unit for determining a delay amount depending on the output of the pattern detecting unit, and a pre-delay line for delaying an internal clock depending on the delay amount that is determined by the pre-delay control means.
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