发明授权
- 专利标题: Asynchronous interconnection system for 3D interchip communication
- 专利标题(中): 用于3D芯片间通信的异步互连系统
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申请号: US12006102申请日: 2007-12-28
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公开(公告)号: US07821293B2公开(公告)日: 2010-10-26
- 发明人: Alberto Fazzi , Luca Ciccarelli , Luca Magagni , Roberto Canegallo , Roberto Guerrieri
- 申请人: Alberto Fazzi , Luca Ciccarelli , Luca Magagni , Roberto Canegallo , Roberto Guerrieri
- 申请人地址: IT Agrate Brianza
- 专利权人: STMicroelectronics, S.r.l.
- 当前专利权人: STMicroelectronics, S.r.l.
- 当前专利权人地址: IT Agrate Brianza
- 代理机构: Graybeal Jackson LLP
- 代理商 Lisa K. Jorgenson; Kevin D. Jablonski
- 优先权: EP06027047 20061229
- 主分类号: H03K19/003
- IPC分类号: H03K19/003
摘要:
An embodiment of the present invention relates to a asynchronous interconnection system comprising a transmitter circuit and a receiver circuit inserted between inserted between respective first and second voltage references and having respective transmitter and receiver nodes coupled in a capacitive manner. The receiver circuit comprises: a recovery stage inserted between the first and second voltage references of the receiver circuit and connected to the receiver node; and a state control stage, in turn inserted between the first and second voltage references of the receiver circuit connected to the recovery stage correspondence with a first feedback node providing a first control signal and having a second feedback node connected in a feedback manner to the recovery stage. The recovery stage comprises a first feedback loop connected to the first feedback node and acting in such a way to recover a received voltage signal and a feedback loop connected to the second feedback node of the state control stage and acting in such a way to deactivate the recovery feedback on the receiver node and guarantee that the receiver node is let in a high impedance state.