发明授权
US07876893B2 Logic circuit and method for calculating an encrypted result operand
有权
用于计算加密结果操作数的逻辑电路和方法
- 专利标题: Logic circuit and method for calculating an encrypted result operand
- 专利标题(中): 用于计算加密结果操作数的逻辑电路和方法
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申请号: US11462144申请日: 2006-08-03
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公开(公告)号: US07876893B2公开(公告)日: 2011-01-25
- 发明人: Antoine Degrendel , Winfried Kamp , Manfred Roth , Thomas Kodytek
- 申请人: Antoine Degrendel , Winfried Kamp , Manfred Roth , Thomas Kodytek
- 申请人地址: DE
- 专利权人: Infineon Technologies AG
- 当前专利权人: Infineon Technologies AG
- 当前专利权人地址: DE
- 代理机构: Dickstein Shapiro LLP
- 优先权: DE102005037357 20050808
- 主分类号: H04L9/28
- IPC分类号: H04L9/28
摘要:
A logic circuit for calculating an encrypted dual-rail result operand from encrypted dual-rail input operands according to a combination rule includes inputs for receiving the input operands and an output for outputting the encrypted result operand. Each operand may comprise a first logic state or a second logic state. The logic circuit comprises a first logic stage connected between the inputs and an intermediate node and a second logic stage connected between the intermediate node and the output. The logic stages are formed to calculate the first or second logic state of the encrypted result operand from the input operands according to the combination rule and to maintain or change exactly once the logic state of the encrypted result operand, independently of an order of arrival of the encrypted input operands, depending on the combination rule, in order to impress the calculated first logic state or second logic state on the output.
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