Invention Grant
US07895506B2 Iterative decoder with early-exit condition detection and methods for decoding
有权
具有早退条件检测的迭代解码器和解码方法
- Patent Title: Iterative decoder with early-exit condition detection and methods for decoding
- Patent Title (中): 具有早退条件检测的迭代解码器和解码方法
-
Application No.: US11612350Application Date: 2006-12-18
-
Publication No.: US07895506B2Publication Date: 2011-02-22
- Inventor: Veerendra Bhora , Raghavan Sudhakar
- Applicant: Veerendra Bhora , Raghavan Sudhakar
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwegman, Lundberg & Woessner, P.A.
- Agent Gregory J. Gorrie
- Main IPC: H03M13/03
- IPC: H03M13/03

Abstract:
Embodiments of an iterative decoder with early-exit condition detection and methods for decoding are generally described herein. Other embodiments may be described and claimed. In some embodiments, a first codeword is generated from decoded bits after one or more half-iterations of an iterative decoder, a second codeword from decoded bits after an additional half-iteration of the iterative decoder, and the first and second codewords are compared to determine whether the decoded bits are valid. In some embodiments, double or triple codeword matching is selected based on an estimated signal-to-noise ratio (SNR) and the modulation level.
Public/Granted literature
- US20080148125A1 ITERATIVE DECODER WITH EARLY-EXIT CONDITION DETECTION AND METHODS FOR DECODING Public/Granted day:2008-06-19
Information query
IPC分类: