Invention Grant
- Patent Title: Nonvolatile memory with a unified cell structure
- Patent Title (中): 具有统一单元结构的非易失性存储器
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Application No.: US12001647Application Date: 2007-12-12
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Publication No.: US07915092B2Publication Date: 2011-03-29
- Inventor: Peter W. Lee , Fu-Chang Hsu , Hsing-Ya Tsao , Han-Rei Ma , Koucheng Wu
- Applicant: Peter W. Lee , Fu-Chang Hsu , Hsing-Ya Tsao , Han-Rei Ma , Koucheng Wu
- Applicant Address: US DE Dover
- Assignee: Abedneja Assets AG L.L.C.
- Current Assignee: Abedneja Assets AG L.L.C.
- Current Assignee Address: US DE Dover
- Main IPC: H01L21/82
- IPC: H01L21/82
Abstract:
A novel FLASH-based EEPROM cell, decoder, and layout scheme are disclosed to eliminate the area-consuming divided triple-well in cell array and allows byte-erase and byte-program for high P/E cycles. Furthermore, the process-compatible FLASH cell for EEPROM part can be integrated with FLASH and ROM parts so that a superior combo, monolithic, nonvolatile memory is achieved. Unlike all previous arts, the novel combo nonvolatile memory of the present invention of ROM, EEPROM and FLASH or combination of any two is made of one unified, fully compatible, highly-scalable BN+ cell and unified process. In addition, its cell operation schemes have zero array overhead and zero disturbance during P/E operations. The novel combo nonvolatile memory is designed to meet the need in those markets requiring flexible write size in units of bytes, pages and blocks at a lower cost.
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