Invention Grant
- Patent Title: MOSFET with isolation structure and fabrication method thereof
- Patent Title (中): 具有隔离结构的MOSFET及其制造方法
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Application No.: US11913044Application Date: 2005-10-14
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Publication No.: US07923787B2Publication Date: 2011-04-12
- Inventor: Chih-Feng Huang , Tuo-Hsin Chien , Jenn-Yu Lin , Ta-Yung Yang
- Applicant: Chih-Feng Huang , Tuo-Hsin Chien , Jenn-Yu Lin , Ta-Yung Yang
- Applicant Address: TW Taipei Hsien
- Assignee: System General Corp.
- Current Assignee: System General Corp.
- Current Assignee Address: TW Taipei Hsien
- Agency: J.C. Patents
- Priority: CN200510066850 20050429
- International Application: PCT/CN2005/001687 WO 20051014
- International Announcement: WO2006/116902 WO 20061109
- Main IPC: H01L21/70
- IPC: H01L21/70

Abstract:
A MOSFET with an isolation structure is provided. An N-type MOSFET includes a first N-type buried layer and a P-type epitaxial layer disposed in a P-type substrate. A P-type FET includes a second N-type buried layer and the P-type epitaxial layer disposed in the P-type substrate. The first, second N-type buried layers and the P-type epitaxial layer provide isolation between FETs. In addition, a plurality of separated P-type regions disposed in the P-type epitaxial layer further provides an isolation effect. A first gap exists between a first thick field oxide layer and a first P-type region, for raising a breakdown voltage of the N-type FET. A second gap exists between a second thick field oxide layer and a second N-well, for raising a breakdown voltage of the P-type FET.
Public/Granted literature
- US20080290410A1 Mosfet With Isolation Structure and Fabrication Method Thereof Public/Granted day:2008-11-27
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