Invention Grant
US07925957B2 Validating data using processor instructions 有权
使用处理器指令验证数据

Validating data using processor instructions
Abstract:
In one embodiment, the present invention includes a method for determining from a data block in a buffer a number of first operands in a first portion of the buffer and a number of second operands in a second portion of the buffer. Based on these numbers, a cyclic redundancy checksum (CRC) operation may be iteratively performed on the first and second operands to obtain a checksum result. The first and second operands are of a different length, and the checksum operation may be executed using processor instructions corresponding to the different lengths. Other embodiments are described and claimed.
Public/Granted literature
Information query
Patent Agency Ranking
0/0