A TFT array substrate includes a gate line, a gate electrode, and a gate pad on a substrate, each of which including stacked layers of a first metal and a transparent conductive material, respectively, a pixel electrode formed of the transparent conductive material, a gate insulation layer on the substrate including the gate line and the gate electrode, the gate insulation layer having first and second open areas exposing the pixel electrode and the gate pad, a semiconductor layer formed on the gate insulation layer, a data line crossing the gate line to define a sub-pixel region, a source electrode diverging from the data line, a drain electrode spaced apart from the source electrode and connected to the pixel electrode, a data pad at an end of the data line; a masking layer covering the data line, the source electrode and the drain electrode, and an oxidation-prevention layer covering the gate pad and the data pad.