Abstract:
An array substrate for a liquid crystal display device includes a substrate, a gate line and a data line on the substrate and crossing each other to define a pixel region, a thin film transistor connected to the gate line and the data line, a first passivation layer on the thin film transistor and having a first unevenness structure at its top surface, an auxiliary unevenness layer on the first passivation layer and having a first roughness structure at its top surface, and a reflector on the auxiliary unevenness layer, the reflector having a second unevenness structure due to the first unevenness structure of the first passivation layer and a second roughness structure due to the first roughness structure of the auxiliary unevenness layer, the second roughness structure having smaller patterns than the second unevenness structure.
Abstract:
The present invention relates to a method for preparing 2-pyrrolidone using biomass, comprising: a step (a) of culturing a microorganism which contains glutamate decarboxylase as a whole-cell catalyst in a culture medium containing glutamic acid or glutamate so as to prepare 4-amino butyric acid; a step (b) of filtering the 4-amino butyric acid from the culture medium in order to obtain the 4-amino butyric acid; and a step (c) of converting the 4-amino butyric acid into 2-pyrrolidone. The present invention provides a series of processes for preparing 2-pyrrolidone from glutamic acid or glutamate using biomass. According to the present invention, 4-amino butyric acid is prepared using a microorganism as a whole cell, and preferably, 4-amino butyric acid which has not undergone a complicated refining process such as a crystallization process is directly used to prepare 2-pyrrolidone at a high yield rate in an economically advantageous manner. According to the present invention, 2-pyrrolidone may be mass-produced at a high yield rate and low production costs. The method of the present invention simplifies processes for preparing 2-pyrrolidone, and thus is suitable for mass production at an industrial scale.
Abstract:
A method for fabricating a process substrate includes: providing a first substrate; providing a substrate and an auxiliary substrate; contacting the substrate and the auxiliary substrate with each other in a vacuum state, thereby forming micro spaces of a vacuum state between the substrate and the auxiliary substrate; and increasing a pressure at the outside of the contacted substrate and auxiliary substrate to attach the substrate and the auxiliary substrate to each other by a pressure difference between the micro spaces and the outside of the contacted substrate and auxiliary substrate.
Abstract:
An in-plane switching mode liquid crystal display according to an embodiment includes gate lines arranged in a first direction on an array substrate, data lines arranged in a second direction substantially perpendicular to the first direction, one or more storage electrodes provided on the array substrate, common electrodes extending across each pixel region, pixel electrodes arranged to be substantially parallel to the common electrodes, the common electrodes and the pixel electrodes being alternately arranged to generate an in-plane field in each pixel region, thin film transistors (TFTs) provided at intersection areas of the gate lines and the data lines, each TFT including a source electrode connected to the corresponding data line, a drain electrode connected to the corresponding pixel electrode and a gate electrode, and at least one common line located under the respective common electrode in the pixel region, the common line being substantially parallel to the data lines.
Abstract:
An in-plane switching mode LCD having a plurality of pixels arranged in a matrix includes a gate line formed on a lower substrate, a data line formed such that the data line intersect the gate line to define a pixel region, a TFT (Thin Film Transistor) formed at the intersection of the gate line and the data line, a pixel electrode connected to the TFT, a common electrode to generate a horizontal electric field with the pixel electrode, and a common line supplying common voltage to the common electrode, wherein the common line comprises a first common line formed parallel to the gate line, a second common line formed parallel to the date line in a side portion of the pixel region adjacent to the data line, and a third common line formed parallel to the gate line and disposed between a first row and a second row of the matrix.
Abstract:
A thin film transistor array substrate and a method for manufacturing the thin film transistor array substrate are disclosed. Specifically, a thin film transistor array may be formed using a reduced number of masks.
Abstract:
A liquid crystal display panel includes: a thin film transistor array substrate having a gate line and a data line provided on the substrate; a gate insulating film between the gate line and the data line; a thin film transistor having a source electrode, a drain electrode and a gate electrode; a pixel electrode; a protective film for protecting the thin film transistor; a plurality of pads; a transparent electrode pattern formed on the data line, source electrode and drain electrode; and a color filter array substrate joined to the thin film transistor array substrate so that the color filter substrate does not overlap the pad area of the thin film transistor array substrate, wherein at least one of the gate insulating film and protective film in the pad area is etched using the color filter array substrate as a mask to expose at least one of the plurality of pads.
Abstract:
A liquid crystal display device is disclosed. The disclosed liquid crystal display device includes gate lines, data lines formed to intersect with the gate lines, thereby defining sub-pixel regions, vertical common lines formed in parallel to the data lines such that at least one vertical common line is arranged for one pixel region, which is constituted by at least three sub-pixel regions, thin film transistors each connected to a corresponding one of the gate lines and a corresponding one of the data lines, pixel electrodes each connected to a corresponding one of the thin film transistors, and common electrodes each connected to a corresponding one of the vertical common lines.
Abstract:
An array substrate for an LCD device and a manufacturing method thereof. The array substrate includes: a gate line, a gate electrode, a gate pad, and a pixel electrode formed on the substrate; a gate insulation layer formed on the substrate to expose the gate line and the pixel electrode; a source electrode connected to a data line crossing the gate line, a drain electrode facing the source electrode with a channel interposed, a data pad formed at one end of the data line, and a capacitor electrode overlapping portions of the pixel electrode and the gate line; a semiconductor layer constituting the channel between the source electrode and the drain electrode; first, second, third, and fourth contact holes formed in the gate pad, the data pad, the capacitor electrode, and the drain electrode, respectively; and first through fourth contact electrodes formed in the first through fourth contact holes, respectively.
Abstract:
A TFT array substrate includes a gate line, a gate electrode, and a gate pad on a substrate, each of which including stacked layers of a first metal and a transparent conductive material, respectively, a pixel electrode formed of the transparent conductive material, a gate insulation layer on the substrate including the gate line and the gate electrode, the gate insulation layer having first and second open areas exposing the pixel electrode and the gate pad, a semiconductor layer formed on the gate insulation layer, a data line crossing the gate line to define a sub-pixel region, a source electrode diverging from the data line, a drain electrode spaced apart from the source electrode and connected to the pixel electrode, a data pad at an end of the data line; a masking layer covering the data line, the source electrode and the drain electrode, and an oxidation-prevention layer covering the gate pad and the data pad.