发明授权
US07939411B2 Method for fabricating semiconductor device with vertical gate 有权
用于制造具有垂直栅极的半导体器件的方法

  • 专利标题: Method for fabricating semiconductor device with vertical gate
  • 专利标题(中): 用于制造具有垂直栅极的半导体器件的方法
  • 申请号: US12493174
    申请日: 2009-06-27
  • 公开(公告)号: US07939411B2
    公开(公告)日: 2011-05-10
  • 发明人: Young-Kyun Jung
  • 申请人: Young-Kyun Jung
  • 申请人地址: KR Gyeonggi-do
  • 专利权人: Hynix Semiconductor Inc.
  • 当前专利权人: Hynix Semiconductor Inc.
  • 当前专利权人地址: KR Gyeonggi-do
  • 代理机构: IP & T Group LLP
  • 优先权: KR10-2008-0113983 20081117
  • 主分类号: H01L21/336
  • IPC分类号: H01L21/336
Method for fabricating semiconductor device with vertical gate
摘要:
A method for fabricating a semiconductor device includes forming buried bit lines in a first substrate; forming a trench that separate the buried bit lines from each other; forming an interlayer insulation layer to gap-fill the trench; forming a second substrate over the first substrate gap-filled with the interlayer insulation layer; forming a protective pattern over the second substrate; forming a plurality of active pillars by etching the second substrate using the protective pattern as an etch barrier; and forming vertical gates surrounding sidewalls of the active pillars.
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