发明授权
US07994059B2 Enhanced stress transfer in an interlayer dielectric by using an additional stress layer above a dual stress liner in a semiconductor device
有权
通过在半导体器件中的双应力衬垫上方使用附加应力层来增强层间电介质中的应力转移
- 专利标题： Enhanced stress transfer in an interlayer dielectric by using an additional stress layer above a dual stress liner in a semiconductor device
- 专利标题（中）： 通过在半导体器件中的双应力衬垫上方使用附加应力层来增强层间电介质中的应力转移
-
申请号： US11865796申请日： 2007-10-02
-
公开(公告)号： US07994059B2公开(公告)日： 2011-08-09
- 发明人: Ralf Richter , Martin Gerhardt , Martin Mazur , Joerg Hohage
- 申请人： Ralf Richter , Martin Gerhardt , Martin Mazur , Joerg Hohage
- 申请人地址： US TX Austin
- 专利权人： Advanced Micro Devices, Inc.
- 当前专利权人： Advanced Micro Devices, Inc.
- 当前专利权人地址： US TX Austin
- 代理机构： Williams, Morgan & Amerson, P.C.
- 优先权： DE102007004824 20070131; DE102007016897 20070410
- 主分类号： H01L21/331
- IPC分类号： H01L21/331
摘要：
By forming an additional stressed dielectric material after patterning dielectric liners of different intrinsic stress, a significant increase of performance in transistors may be obtained while substantially not contributing to patterning non-uniformities during the formation of respective contact openings in highly scaled semiconductor devices. The additional dielectric layer may be provided with any type of intrinsic stress, irrespective of the previously selected patterning sequence.