发明授权
US08039302B2 Semiconductor package and method of forming similar structure for top and bottom bonding pads
有权
半导体封装和形成顶部和底部焊盘的类似结构的方法
- 专利标题: Semiconductor package and method of forming similar structure for top and bottom bonding pads
- 专利标题(中): 半导体封装和形成顶部和底部焊盘的类似结构的方法
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申请号: US11952502申请日: 2007-12-07
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公开(公告)号: US08039302B2公开(公告)日: 2011-10-18
- 发明人: Lionel Chien Hui Tay , Henry D. Bathan , Zigmund R. Camacho
- 申请人: Lionel Chien Hui Tay , Henry D. Bathan , Zigmund R. Camacho
- 申请人地址: SG Singapore
- 专利权人: STATS ChipPAC, Ltd.
- 当前专利权人: STATS ChipPAC, Ltd.
- 当前专利权人地址: SG Singapore
- 代理机构: Patent Law Group
- 代理商 Robert D. Atkins
- 主分类号: H01L21/00
- IPC分类号: H01L21/00
摘要:
A semiconductor package has a first semiconductor die mounted on a substrate. A conductive via is formed through the substrate. A first RDL is formed on a first surface of the substrate in electrical contact with the conductive via and the first semiconductor die. A second RDL is formed on a second surface of the substrate opposite the first surface of the substrate die in electrical contact with the conductive via. A second semiconductor die can be mounted on the substrate and electrically connected to the second RDL. Bonding pads are formed over the first and second surfaces of the substrate in electrical contact with the first and second RDLs, respectively. The bonding pads on opposite surfaces of the substrate are aligned. Solder bumps or bond wires can be formed on the bonding pads. The semiconductor packages can be stacked and electrically connected through the aligned bonding pads.
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