发明授权
US08039400B2 Reducing contamination of semiconductor substrates during BEOL processing by performing a deposition/etch cycle during barrier deposition
有权
通过在阻挡层沉积期间进行沉积/蚀刻循环,在BEOL处理期间减少半导体衬底的污染
- 专利标题: Reducing contamination of semiconductor substrates during BEOL processing by performing a deposition/etch cycle during barrier deposition
- 专利标题(中): 通过在阻挡层沉积期间进行沉积/蚀刻循环,在BEOL处理期间减少半导体衬底的污染
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申请号: US12418857申请日: 2009-04-06
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公开(公告)号: US08039400B2公开(公告)日: 2011-10-18
- 发明人: Frank Koschinsky , Matthias Lehr , Holger Schuehrer
- 申请人: Frank Koschinsky , Matthias Lehr , Holger Schuehrer
- 申请人地址: KY Grand Cayman
- 专利权人: GLOBALFOUNDRIES Inc.
- 当前专利权人: GLOBALFOUNDRIES Inc.
- 当前专利权人地址: KY Grand Cayman
- 代理机构: Williams, Morgan & Amerson, P.C.
- 优先权: DE102008030847 20080630
- 主分类号: H01L21/302
- IPC分类号: H01L21/302
摘要:
A conductive barrier material of a metallization system of a semiconductor device may be formed on the basis of one or more deposition/etch cycles, thereby providing a reduced material thickness in the bevel region, while enhancing overall thickness uniformity in the active region of the semiconductor substrate. In some illustrative embodiments, two or more deposition/etch cycles may be used, thereby providing the possibility to select reduced target values for the barrier thickness in the die regions, while also obtaining a significantly reduced thickness in the bevel region.
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