Invention Grant
US08093070B2 Method for leakage reduction in fabrication of high-density FRAM arrays
有权
高密度FRAM阵列制造中泄漏减少的方法
- Patent Title: Method for leakage reduction in fabrication of high-density FRAM arrays
- Patent Title (中): 高密度FRAM阵列制造中泄漏减少的方法
-
Application No.: US11706722Application Date: 2007-02-15
-
Publication No.: US08093070B2Publication Date: 2012-01-10
- Inventor: Francis Gabriel Celii , Kezhakkedath R. Udayakumar , Gregory B. Shinn , Theodore S. Moise , Scott R. Summerfelt
- Applicant: Francis Gabriel Celii , Kezhakkedath R. Udayakumar , Gregory B. Shinn , Theodore S. Moise , Scott R. Summerfelt
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent John J. Patti; Wade J. Brady, III; Frederick J. Telecky, Jr.
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A method is provided for fabricating a ferroelectric capacitor structure including a method for etching and cleaning patterned ferroelectric capacitor structures in a semiconductor device. The method comprises etching portions of an upper electrode, etching ferroelectric material, and etching a lower electrode to define a patterned ferroelectric capacitor structure, and etching a portion of a lower electrode diffusion barrier structure. The method further comprises ashing the patterned ferroelectric capacitor structure using a first ashing process, where the ash comprises an oxygen/nitrogen/water-containing ash, performing a wet clean process after the first ashing process, and ashing the patterned ferroelectric capacitor structure using a second ashing process.
Public/Granted literature
- US20080081380A1 Method for leakage reduction in fabrication of high-density FRAM arrays Public/Granted day:2008-04-03
Information query
IPC分类: