发明授权
US08121828B2 Detecting conditions for transfer of execution from one computer instruction stream to another and executing transfer on satisfaction of the conditions 有权
检测从一台计算机指令流传输到另一台计算机指令流的条件,并在满足条件的情况下执行转移

Detecting conditions for transfer of execution from one computer instruction stream to another and executing transfer on satisfaction of the conditions
摘要:
A computer has instruction pipeline circuitry capable of executing two instruction set architectures (ISA's). A binary translator translates at least a selected portion of a computer program from a lower-performance one of the ISA's to a higher-performance one of the ISA's. Hardware initiates a query when about to execute a program region coded in the lower-performance ISA, to determine whether a higher-performance translation exists. If so, the about-to-be-executed instruction is aborted, and control transfers to the higher-performance translation. After execution of the higher-performance translation, execution of the lower-performance region is reestablished at a point downstream from the aborted instruction, in a context logically equivalent to that which would have prevailed had the code of the lower-performance region been allowed to proceed.
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