Invention Grant
- Patent Title: Method of interconnecting electronic wafers
- Patent Title (中): 互连电子晶片的方法
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Application No.: US12522426Application Date: 2008-01-28
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Publication No.: US08136237B2Publication Date: 2012-03-20
- Inventor: Christian Val
- Applicant: Christian Val
- Applicant Address: FR
- Assignee: 3D Plus
- Current Assignee: 3D Plus
- Current Assignee Address: FR
- Agency: Lowe Hauptman Ham & Berner, LLP
- Priority: FR0700625 20070130
- International Application: PCT/EP2008/050970 WO 20080128
- International Announcement: WO2008/095811 WO 20080814
- Main IPC: H05K3/36
- IPC: H05K3/36

Abstract:
The invention relates to a method of interconnecting electronic components of a first wafer (T1) with electronic components of a second wafer (T2), each wafer having metallized vias (1) which pass through the wafer in the thickness direction. The method includes deposition of a drop (3) of conductive ink containing solvents on each via (1) of the first wafer (T1); stacking of the second wafer (T2) on the first so that the vias (1) of the second wafer (T2) are substantially superposed on the vias (1) of the first wafer (T1); removal of 50 to 90% of the solvents contained in the drops (3) by heating or applying a vacuum, so as to obtain a pasty ink; and laser sintering of the pasty ink drops (3) so as to produce electrical connections (31) between the superposed metallized vias (1).
Public/Granted literature
- US20100276081A1 METHOD OF INTERCONNECTING ELECTRONIC WAFERS Public/Granted day:2010-11-04
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