Invention Grant
- Patent Title: Electrostatic discharge structure for 3-dimensional integrated circuit through-silicon via device
- Patent Title (中): 三维集成电路通硅片通过器件的静电放电结构
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Application No.: US12564051Application Date: 2009-09-22
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Publication No.: US08164113B2Publication Date: 2012-04-24
- Inventor: Chih-Sheng Lin , Chih-Wen Hsiao , Keng-Li Su
- Applicant: Chih-Sheng Lin , Chih-Wen Hsiao , Keng-Li Su
- Applicant Address: TW Hsinchu
- Assignee: Industrial Technology Research Institute
- Current Assignee: Industrial Technology Research Institute
- Current Assignee Address: TW Hsinchu
- Agency: Jianq Chyun IP Office
- Priority: TW98109183A 20090320
- Main IPC: H01L23/60
- IPC: H01L23/60 ; H01L29/74 ; H01L31/111 ; H01L23/62 ; H01L23/48 ; H02H9/00
Abstract:
An electrostatic discharge (ESD) structure for a 3-dimensional (3D) integrated circuit (IC) through-silicon via (TSV) device is provided. The ESD structure includes a substrate, a TSV device which is formed through the substrate and is equivalent to a resistance-inductance-capacitance (RLC) device, and at least one ESD device which is disposed in the substrate and electrically connected to one end of the TSV device. The ESD structure can protect the 3D IC TSV device.
Public/Granted literature
- US20100237386A1 ELECTROSTATIC DISCHARGE STRUCTURE FOR 3-DIMENSIONAL INTEGRATED CIRCUIT THROUGH-SILICON VIA DEVICE Public/Granted day:2010-09-23
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