A method comprises depositing a first metal containing layer into a trench structure, which contacts a metalized area of a semiconductor structure. The method further includes patterning at least one opening in a resist to the first metal containing layer. The opening should be in alignment with the trench structure. At least a pad metal containing layer is formed within the at least one opening (preferably by electroplating processes). The resist and the first metal layer underlying the resist are then etched (with the second metal layer acting as a mask, in embodiments). The method includes flowing solder material within the trench and on pad metal containing layer after the etching process. The structure is a controlled collapse chip connection (C4) structure comprising at least one electroplated metal layer formed in a resist pattern to form at least one ball limiting metallurgical layer. The structure further includes an underlying metal layer devoid of undercuts.