公开(公告)号：US09040390B2

公开(公告)日：2015-05-26

申请号：US13483663

申请日：2012-05-30

申请人： Timothy H. Daubenspeck ,  Steven E. Molis ,  Gordon C. Osborne, Jr. ,  Wolfgang Sauter ,  Edmund J. Sprogis

发明人： Timothy H. Daubenspeck ,  Steven E. Molis ,  Gordon C. Osborne, Jr. ,  Wolfgang Sauter ,  Edmund J. Sprogis

IPC分类号： H01L21/46 ,  H01L21/683 ,  H01L23/498 ,  H01L21/48 ,  H01L21/768 ,  H01L25/065

CPC分类号： H01L21/6835 ,  H01L21/486 ,  H01L21/76829 ,  H01L23/49816 ,  H01L23/49827 ,  H01L25/0657 ,  H01L2221/68318 ,  H01L2221/68345 ,  H01L2221/68381 ,  H01L2224/131 ,  H01L2225/06513 ,  H01L2225/06517 ,  Y10S438/976 ,  H01L2924/014

摘要： A releasable buried layer for 3-D fabrication and methods of manufacturing is disclosed. The method includes forming an interposer structure which includes forming a carbon rich dielectric releasable layer over a wafer. The method further includes forming back end of the line (BEOL) layers over the carbon rich dielectric layer, including wiring layers and solder bumps. The method further includes bonding the solder bumps to a substrate using flip chip processes. The flip chip processes comprises reflowing the solder bumps and rapidly cooling down the solder bumps which releases the carbon rich dielectric releasable layer from the wafer.

摘要翻译： 公开了用于3-D制造的可释放掩埋层和制造方法。 该方法包括形成中间层结构，其包括在晶片上形成富含碳的电介质可剥离层。 该方法还包括在富含碳的电介质层上形成线（BEOL）层的后端，包括布线层和焊料凸块。 该方法还包括使用倒装芯片工艺将焊料凸块接合到衬底上。 倒装芯片工艺包括回流焊料凸块并快速冷却焊料凸块，从而将富碳介电层可释放层从晶片上释放出来。

公开(公告)号：US08916464B2

公开(公告)日：2014-12-23

申请号：US12344711

申请日：2008-12-29

申请人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Sauter ,  Timothy D. Sullivan

发明人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Sauter ,  Timothy D. Sullivan

IPC分类号： H01L23/488 ,  H01L21/44 ,  H01L23/00

CPC分类号： H01L24/13 ,  H01L24/03 ,  H01L24/05 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0401 ,  H01L2224/05011 ,  H01L2224/05017 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05551 ,  H01L2224/05555 ,  H01L2224/05557 ,  H01L2224/05644 ,  H01L2224/13006 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/13111 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/00013 ,  H01L2924/01002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01093 ,  H01L2924/0132 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/0103 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599

摘要： Structures with improved solder bump connections and methods of fabricating such structures are provided herein. The structure includes a via formed in a dielectric layer to expose a contact pad and a capture pad formed in the via and over the dielectric layer. The capture pad has openings over the dielectric layer to form segmented features. The solder bump is deposited on the capture pad and the openings over the dielectric layer.

摘要翻译： 具有改善的焊料凸点连接的结构和制造这种结构的方法在本文中提供。 该结构包括在电介质层中形成的通孔，以露出形成在通孔中和电介质层上的接触焊盘和捕获焊盘。 捕获垫在电介质层上具有开口以形成分段特征。 焊料凸块沉积在捕获垫上并且在介电层上沉积开口。

公开(公告)号：US08819933B2

公开(公告)日：2014-09-02

申请号：US12957431

申请日：2010-12-01

申请人： Timothy Harrison Daubenspeck ,  Jeffrey Peter Gambino ,  Christopher David Muzzy ,  Wolfgang Sauter

发明人： Timothy Harrison Daubenspeck ,  Jeffrey Peter Gambino ,  Christopher David Muzzy ,  Wolfgang Sauter

IPC分类号： H01R43/02

CPC分类号： H01L24/10 ,  H01L23/49838 ,  H01L23/528 ,  H01L24/12 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05018 ,  H01L2224/05022 ,  H01L2224/05558 ,  H01L2224/13 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/16 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H05K1/0265 ,  H05K1/111 ,  H05K1/112 ,  H05K2201/0769 ,  H05K2201/09436 ,  H05K2201/09509 ,  H05K2201/0979 ,  Y02P70/611 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49155 ,  Y10T29/49179 ,  H01L2924/00

摘要： A method for forming an electrical structure. The electrical structure comprises an interconnect structure and a substrate. The substrate comprises an electrically conductive pad and a plurality of wire traces electrically connected to the electrically conductive pad. The electrically conductive pad is electrically and mechanically connected to the interconnect structure. The plurality of wire traces comprises a first wire trace, a second wire trace, a third wire trace, and a fourth wire trace. The first wire trace and second wire trace are each electrically connected to a first side of the electrically conductive pad. The third wire trace is electrically connected to a second side of the electrically conductive pad. The fourth wire trace is electrically connected to a third side of said first electrically conductive pad. The plurality of wire traces are configured to distribute a current.

摘要翻译： 一种形成电结构的方法。 电结构包括互连结构和衬底。 衬底包括导电焊盘和电连接到导电焊盘的多个导线迹线。 导电焊盘电连接和机械连接到互连结构。 多条导线包括第一线迹线，第二线迹线，第三线迹线和第四线迹线。 第一线迹和第二线迹均电连接到导电垫的第一侧。 第三线迹电连接到导电垫的第二侧。 第四线迹电连接到所述第一导电焊盘的第三侧。 多个导线配置成分布电流。

公开(公告)号：US08809182B2

公开(公告)日：2014-08-19

申请号：US12113230

申请日：2008-05-01

申请人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Sauter

发明人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Sauter

IPC分类号： H01L21/44

CPC分类号： H01L24/11 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/14 ,  H01L2224/02125 ,  H01L2224/0231 ,  H01L2224/0236 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05569 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/16 ,  H01L2224/45124 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2924/0001 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01076 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2924/00

摘要： A controlled collapse chip connection (C4) method and integrated circuit structure for lead (Pb)-free solder balls with stress relief to the underlying insulating layers of the integrated circuit chip by disposing soft thick insulating cushions beneath the solder balls and connecting the metallization of the integrated circuit out-of-contact of the cushions but within the pitch of the solder balls.

摘要翻译： 一种控制崩溃芯片连接（C4）方法和用于无铅焊料球的集成电路结构，其通过在焊球下方设置柔软的厚绝缘垫并将金属化连接到集成电路芯片的下层绝缘层 衬垫的集成电路不接触，但在焊球的间距内。

公开(公告)号：US08742594B2

公开(公告)日：2014-06-03

申请号：US13615960

申请日：2012-09-14

申请人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Sauter

发明人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Sauter

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/585 ,  H01L2224/13147 ,  H01L2224/94 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2924/00

摘要： A structure and method of making an offset-trench crackstop, which forms an air gap in a passivation layer that is adjacent to a passivated top metal layer of a metal crackstop in an integrated circuit (IC) die. The offset-trench crackstop may expose a portion of a topmost dielectric layer in the crackstop region, not expose a topmost patterned metal layer of the metal crackstop, and may be interposed between the metal crackstop and an active device region. Alternatively, the offset-trench crackstop may expose a portion of the topmost dielectric layer, which separates an outermost metal layer and an innermost metal layer of the metal crackstop, and does not expose any of the topmost patterned metal layer of the metal crackstop, where the innermost metal layer of the metal crackstop is interposed between the offset-trench crackstop in the crackstop region and the active device region of the IC die.

摘要翻译： 一种制造偏移沟槽裂缝挡板的结构和方法，其在与集成电路（IC）模具中的金属裂缝挡板的钝化顶部金属层相邻的钝化层中形成气隙。 偏移沟槽裂缝挡板可能暴露裂纹区域中最顶层电介质层的一部分，而不会暴露金属裂纹阻挡层的最顶层图案化金属层，并且可以插入在金属裂缝挡板和有源器件区域之间。 或者，偏移沟槽裂缝挡板可以暴露最外层介电层的一部分，其分隔金属裂纹器的最外金属层和最内金属层，并且不暴露金属裂纹器的任何最顶层的图案化金属层，其中 金属裂缝挡板的最内侧金属层介于裂纹区域的偏移沟槽裂缝和IC模具的有源器件区域之间。

公开(公告)号：US08742578B2

公开(公告)日：2014-06-03

申请号：US13552792

申请日：2012-07-19

申请人： Charles L. Arvin ,  Eric D. Perfecto ,  Wolfgang Sauter ,  Jennifer D. Schuler

发明人： Charles L. Arvin ,  Eric D. Perfecto ,  Wolfgang Sauter ,  Jennifer D. Schuler

IPC分类号： H01L23/48

CPC分类号： H01L23/49816 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L2224/0401 ,  H01L2224/05571 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13139 ,  H01L2224/1403 ,  H01L2224/141 ,  H01L2224/16237 ,  H01L2224/81193 ,  H01L2224/81439 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/81 ,  H01L2224/11 ,  H01L2224/05552

摘要： An integrated circuit (IC) chip including solder structures for connection to a package substrate, an IC chip package, and a method of forming the same are disclosed. In an embodiment, an IC chip is provided comprising a wafer having a plurality of solder structures disposed above the wafer. A ball limiting metallurgy (BLM) layer is disposed between each of the plurality of solder structures and the wafer. At least one of the plurality of solder structures has a first diameter and a first height, and at least one other solder structure has a second diameter and a second height. The differing heights and volumes of solder structures facilitate solder volume compensation for chip join improvement on the IC chip side rather than the package side.

摘要翻译： 公开了一种集成电路（IC）芯片，其包括用于连接到封装衬底的焊料结构，IC芯片封装及其形成方法。 在一个实施例中，提供一种IC芯片，其包括具有设置在晶片上方的多个焊料结构的晶片。 球限制冶金（BLM）层设置在多个焊料结构和晶片之间。 多个焊料结构中的至少一个具有第一直径和第一高度，并且至少一个其它焊料结构具有第二直径和第二高度。 焊料结构的不同高度和体积有助于在IC芯片侧而不是封装侧进行芯片连接改进的焊料体积补偿。

公开(公告)号：US08680675B2

公开(公告)日：2014-03-25

申请号：US12908554

申请日：2010-10-20

申请人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Sauter ,  Timothy D. Sullivan

发明人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Sauter ,  Timothy D. Sullivan

IPC分类号： H01L21/00

CPC分类号： H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/02125 ,  H01L2224/0401 ,  H01L2224/05017 ,  H01L2224/05556 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/114 ,  H01L2224/116 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2224/13099 ,  H01L2924/00012 ,  H01L2924/00014

摘要： Structures with improved solder bump connections and methods of fabricating such structures are provided herein. The method includes forming a plurality of trenches in a dielectric layer extending to an underlying metal layer. The method further includes depositing metal in the plurality of trenches to form discrete metal line islands in contact with the underlying metal layer. The method also includes forming a solder bump in electrical connection to the plurality of metal line islands.

摘要翻译： 具有改善的焊料凸点连接的结构和制造这种结构的方法在本文中提供。 该方法包括在延伸到下面的金属层的电介质层中形成多个沟槽。 该方法还包括在多个沟槽中沉积金属以形成与下面的金属层接触的离散金属线岛。 该方法还包括形成与多个金属线岛电连接的焊料凸块。

公开(公告)号：US08592976B2

公开(公告)日：2013-11-26

申请号：US13615826

申请日：2012-09-14

申请人： Charles L. Arvin ,  Timothy Harrison Daubenspeck ,  Wolfgang Sauter ,  Timothy Dooling Sullivan

发明人： Charles L. Arvin ,  Timothy Harrison Daubenspeck ,  Wolfgang Sauter ,  Timothy Dooling Sullivan

IPC分类号： H01L23/48

CPC分类号： H01L24/11 ,  H01L24/03 ,  H01L24/05 ,  H01L24/12 ,  H01L24/94 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/05559 ,  H01L2224/1147 ,  H01L2224/13006 ,  H01L2224/13017 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/274 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/00012

摘要： A structure. The structure includes: a first dielectric layer which includes a top dielectric surface; an electrically conductive line on the first dielectric layer; a second dielectric layer on the first dielectric layer and the electrically conductive line; a ball-limiting-metallurgy (BLM) region on the second dielectric layer and the electrically conductive line such that the BLM region is electrically connected to the electrically conductive line; and a solder ball on the BLM region. The BLM region has a characteristic that a length of the longest straight line segment which is parallel to the top dielectric surface and is entirely in the BLM region does not exceed a pre-specified maximum value, wherein the pre-specified maximum value is at most one-half of a maximum horizontal dimension of the BLM region measured in a horizontal direction parallel to the top dielectric surface.

摘要翻译： 一个结构。 该结构包括：第一电介质层，其包括顶部电介质表面; 在所述第一电介质层上的导电线; 在所述第一电介质层和所述导电线上的第二电介质层; 所述第二电介质层和所述导电线上的限界冶金（BLM）区域使得所述BLM区电连接到所述导电线; 和BLM区域上的焊球。 BLM区域的特征在于，平行于顶部电介质表面并且完全在BLM区域中的最长直线段的长度不超过预定的最大值，其中预定的最大值最多为 BLM区域的最大水平尺寸的一半在平行于顶部电介质表面的水平方向上测量。

公开(公告)号：US08492892B2

公开(公告)日：2013-07-23

申请号：US12963139

申请日：2010-12-08

申请人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Ekta Misra ,  Christopher D. Muzzy ,  Wolfgang Sauter ,  George J. Scott

发明人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Ekta Misra ,  Christopher D. Muzzy ,  Wolfgang Sauter ,  George J. Scott

IPC分类号： H01L23/48 ,  H01L29/40 ,  H01L23/28

CPC分类号： H01L24/10 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/02126 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/0348 ,  H01L2224/03614 ,  H01L2224/0391 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/05005 ,  H01L2224/05016 ,  H01L2224/05022 ,  H01L2224/05026 ,  H01L2224/0508 ,  H01L2224/05094 ,  H01L2224/05096 ,  H01L2224/051 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05171 ,  H01L2224/05562 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/10126 ,  H01L2224/11 ,  H01L2224/111 ,  H01L2224/11334 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/11912 ,  H01L2224/13 ,  H01L2224/13111 ,  H01L2224/16225 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/01027 ,  H01L2924/00 ,  H01L2224/05552

摘要： Solder bump connections and methods for fabricating solder bump connections. The method includes forming a layer stack containing first and second conductive layers, forming a dielectric passivation layer on a top surface of the second conductive layer, and forming a via opening extending through the dielectric passivation layer to the top surface of the second conductive layer. The method further includes forming a conductive plug in the via opening. The solder bump connection includes first and second conductive layers comprised of different conductors, a dielectric passivation layer on a top surface of the second conductive layer, a via opening extending through the dielectric passivation layer to the top surface of the second conductive layer, and a conductive plug in the via opening.

摘要翻译： 焊接凸块连接和制造焊料凸点连接的方法。 该方法包括形成包含第一和第二导电层的层叠层，在第二导电层的顶表面上形成电介质钝化层，以及形成延伸穿过介电钝化层的通孔至第二导电层的顶表面。 该方法还包括在通孔开口中形成导电塞。 焊料凸点连接包括由不同导体组成的第一和第二导电层，在第二导电层的顶表面上的介电钝化层，延伸穿过介电钝化层到第二导电层顶表面的通孔，以及 导电塞在通孔开口中。

公开(公告)号：US20130119534A1

公开(公告)日：2013-05-16

申请号：US13298183

申请日：2011-11-16

申请人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  David L. Questad ,  Wolfgang Sauter ,  Timothy D. Sullivan

发明人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  David L. Questad ,  Wolfgang Sauter ,  Timothy D. Sullivan

IPC分类号： H01L23/498

CPC分类号： H01L23/3171 ,  H01L23/3192 ,  H01L23/562 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/02126 ,  H01L2224/02235 ,  H01L2224/0401 ,  H01L2224/05019 ,  H01L2224/05022 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05552 ,  H01L2224/05556 ,  H01L2224/05558 ,  H01L2224/05572 ,  H01L2224/05582 ,  H01L2224/05583 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/06051 ,  H01L2224/061 ,  H01L2224/0612 ,  H01L2224/06131 ,  H01L2224/13007 ,  H01L2224/13017 ,  H01L2224/13022 ,  H01L2224/13027 ,  H01L2224/13111 ,  H01L2224/1312 ,  H01L2224/14051 ,  H01L2224/141 ,  H01L2224/16225 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2924/00 ,  H01L2924/15311 ,  H01L2924/351 ,  H01L2924/3512 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/01049 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/00012

摘要： A topographical feature is formed proximate to a conductive bond pad that is used to couple a solder bump to a semiconductor die. The topographical feature is separated from the conductive bond pad by a gap. In one embodiment, the topographical feature is formed at a location that is slightly beyond the perimeter of the solder bump, wherein an edge of the bump is aligned vertically to coincide with the gap separating the conductive bond pad from the topographical feature. The topographical feature provides thickness enhancement of a non-conductive layer disposed over the semiconductor die and the conductive bond pad and stress buffering.

摘要翻译： 形成靠近用于将焊料凸块耦合到半导体管芯的导电接合焊盘的形貌特征。 地形特征与导电接合垫隔开间隙。 在一个实施例中，形貌特征形成在稍微超出焊料凸块周边的位置处，其中凸块的边缘垂直对齐，以将导电接合焊盘与形貌特征分开。 形貌特征提供了设置在半导体管芯上的非导电层的厚度增强和导电接合焊盘和应力缓冲。