A generator of a signal including a memory in which instructions are stored, each instruction including a code portion and an argument portion; circuitry for successively reading instructions stored in the memory; decoding circuitry capable of receiving, for each read instruction, the code portion of the instruction and of providing an activation signal which depends on the code portion; and circuitry for providing the signal capable of receiving, for each read instruction, the argument portion of the instruction and capable, according to the activation signal, of storing the argument portion and of providing the signal equal to the argument portion or of providing the signal equal to the previously-stored argument portion.