Invention Grant
- Patent Title: Power semiconductor device having low gate input resistance
- Patent Title (中): 具有低栅极输入电阻的功率半导体器件
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Application No.: US12840283Application Date: 2010-07-20
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Publication No.: US08178923B2Publication Date: 2012-05-15
- Inventor: Wei-Chieh Lin , Guo-Liang Yang , Jia-Fu Lin , Shian-Hau Liao
- Applicant: Wei-Chieh Lin , Guo-Liang Yang , Jia-Fu Lin , Shian-Hau Liao
- Applicant Address: TW Hsinchu Science Park, Hsinchu
- Assignee: Sinopower Semiconductor Inc.
- Current Assignee: Sinopower Semiconductor Inc.
- Current Assignee Address: TW Hsinchu Science Park, Hsinchu
- Agent Winston Hsu; Scott Margo
- Priority: TW99116982A 20100527
- Main IPC: H01L23/48
- IPC: H01L23/48
Abstract:
A power semiconductor device having low gate input resistance and a manufacturing method thereof are provided. The power semiconductor device includes a substrate, at least a trench transistor, a conductive layer, a metal contact plug, an insulating layer, an interlayer dielectric, a gate metal layer, and a source metal layer. The metal contact plug can serve as a buried gate metal bus line, and the metal contact plug can pass under the source metal layer and keeps the area of the source metal layer complete. Accordingly, the present invention can provide a lower gate input resistance without dividing the source metal layer, so the source metal layer can have a larger and complete area for the following packaging and bonding process.
Public/Granted literature
- US20110291183A1 POWER SEMICONDUCTOR DEVICE HAVING LOW GATE INPUT RESISTANCE AND MANUFACTURING METHOD THEREOF Public/Granted day:2011-12-01
Information query
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