Invention Grant
- Patent Title: Pseudo-inverter circuit on SeOI
- Patent Title (中): SeOI上的伪逆变电路
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Application No.: US12793553Application Date: 2010-06-03
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Publication No.: US08223582B2Publication Date: 2012-07-17
- Inventor: Carlos Mazure , Richard Ferrant , Bich-Yen Nguyen
- Applicant: Carlos Mazure , Richard Ferrant , Bich-Yen Nguyen
- Applicant Address: FR Bernin
- Assignee: Soitec
- Current Assignee: Soitec
- Current Assignee Address: FR Bernin
- Agency: Winston & Strawn LLP
- Priority: FR1052543 20100402
- Main IPC: G11C8/00
- IPC: G11C8/00

Abstract:
A circuit made on a semiconductor-on-insulator substrate. The circuit includes a first transistor having a first channel, a second transistor having a second channel, with the transistors provided in serial association between first and second terminals for applying a power supply potential, each of the transistors comprising a drain region and a source region in the thin layer, a channel extending between the source region and the drain region, and a front control gate located above the channel. Each transistor has a back control gate formed in the base substrate below the channel of the transistor and capable of being biased in order to modulate the threshold voltage of the transistor. At least one of the transistors is configured for operating in a depletion mode under the action of a back gate signal which will sufficiently modulate its threshold voltage.
Public/Granted literature
- US20110242926A1 PSEUDO-INVERTER CIRCUIT ON SeO1 Public/Granted day:2011-10-06
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