For decreasing errors within an analog phase-locked loop, an all-digital phase-locked loop (ADPLL) with digital components and digital operations is used. The ADPLL may also be used for direct frequency modulation (DFM). By defining a proportional path gain of an ADPLL by a bandwidth and a reference frequency of the ADPLL, by a TDC gain, a DCO gain, a dividing ratio of a frequency divider, a gain of an amplifier or a combination thereof, the gain of the amplifier may be adjusted so that an optimal loop bandwidth of the ADPLL may be well calibrated. For achieving the aim of entirely digital of the ADPLL, the gains of the TDC and the DCO may be further adjusted in a digital manner.