发明授权
- 专利标题: Semiconductor fabrication facility visualization system with performance optimization
- 专利标题(中): 半导体制造设备可视化系统,具有性能优化
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申请号: US12390395申请日: 2009-02-20
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公开(公告)号: US08229587B2公开(公告)日: 2012-07-24
- 发明人: Karl Shieh , Michael A. Cookson , Norma B. Riley , Donald Rex Wright , Joseph John Fatula, Jr.
- 申请人: Karl Shieh , Michael A. Cookson , Norma B. Riley , Donald Rex Wright , Joseph John Fatula, Jr.
- 申请人地址: JP Kyoto
- 专利权人: Muratec Automation Co., Ltd.
- 当前专利权人: Muratec Automation Co., Ltd.
- 当前专利权人地址: JP Kyoto
- 代理机构: Fish & Richardson P.C.
- 主分类号: G06F19/00
- IPC分类号: G06F19/00
摘要:
A semiconductor fabrication facility (fab) configuration module is defined to virtually model physical systems and attributes of a fab. A data acquisition module is defined to interface with the physical systems of the fab and gather operational data from the physical systems. A visualizer module is defined to collect and aggregate the operational data gathered from the physical systems. The visualizer module is further defined to process the operational data into a format suitable for visual rendering. The processed operational data is displayed within a visual context of the fab in a graphical user interface controlled by the visualizer module. An analyzer module is defined to analyze data collected by the visualizer module and to resolve queries regarding fab performance. An optimizer module is defined to control systems within the fab in response to data collected by the visualizer module, data generated by the analyzer module, or a combination thereof.
公开/授权文献
- US20100023151A1 VAO Productivity Suite 公开/授权日:2010-01-28
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