Invention Grant
- Patent Title: Clock circuit and method for pulsed latch circuits
- Patent Title (中): 脉冲锁存电路的时钟电路和方法
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Application No.: US12688741Application Date: 2010-01-15
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Publication No.: US08232824B2Publication Date: 2012-07-31
- Inventor: Chung-Hsing Wang , Chih-Chieh Chen , Chih Sheng Tsai , Shu Yi Ying
- Applicant: Chung-Hsing Wang , Chih-Chieh Chen , Chih Sheng Tsai , Shu Yi Ying
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H03K3/017
- IPC: H03K3/017

Abstract:
Circuits and methods for providing a pulsed clock signal for use with pulsed latch circuits are described. A variable pulse generator is coupled to form a pulsed clock output responsive to a control signal and a clock input signal. A feedback loop is provided with a pulse monitor and a pulse control circuit. Samples of the pulsed clock signal are taken by the pulse monitor and an output is formed in the form of a pattern. The pulse control circuit receives the output of the monitor and determines whether it matches a predetermined pattern. Adjustments are made to the control signal to adaptively adjust the pulsed clock signal. The feedback loop may operate continuously. In alternative embodiments the feedback loop may be powered down. Methods for adaptively controlling a pulsed clock signal are disclosed.
Public/Granted literature
- US20100259308A1 Clock Circuit and Method for Pulsed Latch Circuits Public/Granted day:2010-10-14
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