Invention Grant
- Patent Title: Forming a non-planar transistor having a quantum well channel
- Patent Title (中): 形成具有量子阱通道的非平面晶体管
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Application No.: US13046061Application Date: 2011-03-11
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Publication No.: US08237153B2Publication Date: 2012-08-07
- Inventor: Chi On Chui , Prashant Majhi , Wilman Tsai , Jack T. Kavalieros
- Applicant: Chi On Chui , Prashant Majhi , Wilman Tsai , Jack T. Kavalieros
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Trop, Pruner & Hu, P.C.
- Main IPC: H01L29/778
- IPC: H01L29/778
Abstract:
In one embodiment, the present invention includes an apparatus having a substrate, a buried oxide layer formed on the substrate, a silicon on insulator (SOI) core formed on the buried oxide layer, a compressive strained quantum well (QW) layer wrapped around the SOI core, and a tensile strained silicon layer wrapped around the QW layer. Other embodiments are described and claimed.
Public/Granted literature
- US20110156006A1 Forming A Non-Planar Transistor Having A Quantum Well Channel Public/Granted day:2011-06-30
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