Invention Grant
- Patent Title: Semiconductor memory device having multiple ports
- Patent Title (中): 半导体存储器件具有多个端口
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Application No.: US13026649Application Date: 2011-02-14
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Publication No.: US08238192B2Publication Date: 2012-08-07
- Inventor: Koji Nii
- Applicant: Koji Nii
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: McDermott Will & Emery LLP
- Priority: JP2006-031391 20060208
- Main IPC: G11C8/00
- IPC: G11C8/00

Abstract:
A multiple-port semiconductor memory device capable of achieving a smaller circuit area is provided. A power supply line supplying an operation voltage of a memory cell is formed in an identical metal interconnection layer where word lines are formed and it is provided adjacent to and between corresponding first word line and second word line. Then, for example, when the same memory cell row is accessed, a voltage level of the power supply line is raised by a coupling capacitance of the word lines. Thus, even in identical-row-access, static noise margin in identical-row-access can be maintained to be as great as that in different-row-access. Therefore, for example, even when a size or the like of a driver transistor is not made larger, deterioration of static noise margin can be suppressed and a circuit area can be made smaller.
Public/Granted literature
- US20110134706A1 SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2011-06-09
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