发明授权
- 专利标题: Distributed micro instructions set processor architecture for high-efficiency signal processing
- 专利标题(中): 分布式微指令集处理器架构,用于高效率信号处理
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申请号: US13194547申请日: 2011-07-29
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公开(公告)号: US08244270B2公开(公告)日: 2012-08-14
- 发明人: Song Chen , Paul L. Chou , Christopher C. Woodthorpe , Venugopal Balasubramonian , Keith Rieken
- 申请人: Song Chen , Paul L. Chou , Christopher C. Woodthorpe , Venugopal Balasubramonian , Keith Rieken
- 申请人地址: DE Neubiberg
- 专利权人: Intel Mobile Communications GmbH
- 当前专利权人: Intel Mobile Communications GmbH
- 当前专利权人地址: DE Neubiberg
- 代理机构: Dickstein Shapiro LLP
- 主分类号: H04Q7/20
- IPC分类号: H04Q7/20 ; H04W72/00
摘要:
A wireless communication system hosts a plurality of processes in accordance with a communication protocol. The system includes application specific instruction set processors (ASISPs) that provided computation support for the process. Each ASISP is capable of executing a subset of the functions of a communication protocol. A scheduler is used to schedule the ASISPs in a time-sliced algorithm so that each ASISP supports several processes. In this architecture, the ASISP actively performs computations for one of the supported processes (active process) at any given time. The state information of each process supported by a particular ASISP is stored in a memory bank that is uniquely associated with the ASISP. When a scheduler instructs an ASISP to change which process is the active process, the state information for the inactivated process is stored in the memory bank and the state information for the newly activated process is retrieved from the memory bank.
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