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    Distributed micro instructions set processor architecture for high-efficiency signal processing
    3.
    发明授权
    Distributed micro instructions set processor architecture for high-efficiency signal processing 有权
    分布式微指令集处理器架构，用于高效率信号处理

    公开(公告)号：US08244270B2

    公开(公告)日：2012-08-14

    申请号：US13194547

    申请日：2011-07-29

    申请人： Song Chen ,  Paul L. Chou ,  Christopher C. Woodthorpe ,  Venugopal Balasubramonian ,  Keith Rieken

    发明人： Song Chen ,  Paul L. Chou ,  Christopher C. Woodthorpe ,  Venugopal Balasubramonian ,  Keith Rieken

    IPC分类号： H04Q7/20 ,  H04W72/00

    CPC分类号： G06F15/78 ,  G06F9/30079 ,  G06F9/30083 ,  G06F9/30087 ,  G06F9/3009 ,  G06F9/3885 ,  G06F9/462 ,  G06F9/4881 ,  Y02D10/24

    摘要： A wireless communication system hosts a plurality of processes in accordance with a communication protocol. The system includes application specific instruction set processors (ASISPs) that provided computation support for the process. Each ASISP is capable of executing a subset of the functions of a communication protocol. A scheduler is used to schedule the ASISPs in a time-sliced algorithm so that each ASISP supports several processes. In this architecture, the ASISP actively performs computations for one of the supported processes (active process) at any given time. The state information of each process supported by a particular ASISP is stored in a memory bank that is uniquely associated with the ASISP. When a scheduler instructs an ASISP to change which process is the active process, the state information for the inactivated process is stored in the memory bank and the state information for the newly activated process is retrieved from the memory bank.

    摘要翻译： 无线通信系统根据通信协议承载多个进程。 该系统包括为该过程提供计算支持的特定于应用程序的指令集处理器（ASISP）。 每个ASISP能够执行通信协议的功能的子集。 调度程序用于以时间分片算法调度ASISP，以便每个ASISP支持多个进程。 在这种体系结构中，ASISP在任何给定的时间主动执行一个受支持进程（活动进程）的计算。 由特定ASISP支持的每个进程的状态信息存储在与ASISP唯一相关联的存储体中。 当调度器指示ASISP改变哪个进程是活动进程时，将非活动进程的状态信息存储在存储体中，并且从存储体检索新激活的进程的状态信息。

    Distributed micro instruction set processor architecture for high-efficiency signal processing
    4.
    发明授权
    Distributed micro instruction set processor architecture for high-efficiency signal processing 有权
    分布式微指令集处理器架构，用于高效率信号处理

    公开(公告)号：US08014786B2

    公开(公告)日：2011-09-06

    申请号：US11841604

    申请日：2007-08-20

    申请人： Song Chen ,  Paul L. Chou ,  Christopher C. Woodthorpe ,  Venugopal Balasubramonian ,  Keith Rieken

    发明人： Song Chen ,  Paul L. Chou ,  Christopher C. Woodthorpe ,  Venugopal Balasubramonian ,  Keith Rieken

    IPC分类号： H04Q7/20

    CPC分类号： G06F15/78 ,  G06F9/30079 ,  G06F9/30083 ,  G06F9/30087 ,  G06F9/3009 ,  G06F9/3885 ,  G06F9/462 ,  G06F9/4881 ,  Y02D10/24

    摘要： A wireless communication system hosts a plurality of processes in accordance with a communication protocol. The system includes application specific instruction set processors (ASISPs) that provided computation support for the process. Each ASISP is capable of executing a subset of the functions of a communication protocol. A scheduler is used to schedule the ASISPs in a time-sliced algorithm so that each ASISP supports several processes. In this architecture, the ASISP actively performs computations for one of the supported processes (active process) at any given time. The state information of each process supported by a particular ASISP is stored in a memory bank that is uniquely associated with the ASISP. When a scheduler instructs an ASISP to change which process is the active process, the state information for the inactivated process is stored in the memory bank and the state information for the newly activated process is retrieved from the memory bank.

    摘要翻译： 无线通信系统根据通信协议承载多个进程。 该系统包括为该过程提供计算支持的特定于应用程序的指令集处理器（ASISP）。 每个ASISP能够执行通信协议的功能的子集。 调度程序用于以时间分片算法调度ASISP，以便每个ASISP支持多个进程。 在这种体系结构中，ASISP在任何给定的时间主动执行一个受支持进程（活动进程）的计算。 由特定ASISP支持的每个进程的状态信息存储在与ASISP唯一相关联的存储体中。 当调度器指示ASISP改变哪个进程是活动进程时，将非活动进程的状态信息存储在存储体中，并且从存储体检索新激活的进程的状态信息。

    DISTRIBUTED MICRO INSTRUCTION SET PROCESSOR ARCHITECTURE FOR HIGH-EFFICIENCY SIGNAL PROCESSING
    6.
    发明申请
    DISTRIBUTED MICRO INSTRUCTION SET PROCESSOR ARCHITECTURE FOR HIGH-EFFICIENCY SIGNAL PROCESSING 有权
    分布式微指令集处理器架构实现高效信号处理

    公开(公告)号：US20080084850A1

    公开(公告)日：2008-04-10

    申请号：US11841604

    申请日：2007-08-20

    申请人： Song Chen ,  Paul Chou ,  Christopher Woodthorpe ,  Venugopal Balasubramonian ,  Keith Rieken

    发明人： Song Chen ,  Paul Chou ,  Christopher Woodthorpe ,  Venugopal Balasubramonian ,  Keith Rieken

    IPC分类号： H04B7/216 ,  H04J3/06

    CPC分类号： G06F15/78 ,  G06F9/30079 ,  G06F9/30083 ,  G06F9/30087 ,  G06F9/3009 ,  G06F9/3885 ,  G06F9/462 ,  G06F9/4881 ,  Y02D10/24

    摘要： A wireless communication system hosts a plurality of processes in accordance with a communication protocol. The system includes application specific instruction set processors (ASISPs) that provided computation support for the process. Each ASISP is capable of executing a subset of the functions of a communication protocol. A scheduler is used to schedule the ASISPs in a time-sliced algorithm so that each ASISP supports several processes. In this architecture, the ASISP actively performs computations for one of the supported processes (active process) at any given time. The state information of each process supported by a particular ASISP is stored in a memory bank that is uniquely associated with the ASISP. When a scheduler instructs an ASISP to change which process is the active process, the state information for the inactivated process is stored in the memory bank and the state information for the newly activated process is retrieved from the memory bank.

    摘要翻译： 无线通信系统根据通信协议承载多个进程。 该系统包括为该过程提供计算支持的特定于应用程序的指令集处理器（ASISP）。 每个ASISP能够执行通信协议的功能的子集。 调度程序用于以时间分片算法调度ASISP，以便每个ASISP支持多个进程。 在这种体系结构中，ASISP在任何给定的时间主动执行一个受支持进程（活动进程）的计算。 由特定ASISP支持的每个进程的状态信息存储在与ASISP唯一相关联的存储体中。 当调度器指示ASISP改变哪个进程是活动进程时，将非活动进程的状态信息存储在存储体中，并且从存储体检索新激活的进程的状态信息。