发明授权
- 专利标题: Power management method and related chipset and computer system
- 专利标题(中): 电源管理方法及相关芯片组及计算机系统
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申请号: US12623546申请日: 2009-11-23
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公开(公告)号: US08250393B2公开(公告)日: 2012-08-21
- 发明人: Shuang-Shuang Qin , Cheng-Wei Huang
- 申请人: Shuang-Shuang Qin , Cheng-Wei Huang
- 申请人地址: TW New Taipei
- 专利权人: Via Technologies, Inc.
- 当前专利权人: Via Technologies, Inc.
- 当前专利权人地址: TW New Taipei
- 代理机构: Thomas|Kayden
- 优先权: CN200910135752 20090424
- 主分类号: G06F1/26
- IPC分类号: G06F1/26 ; G06F1/00 ; G06F3/038 ; G06F17/00 ; G06F15/00 ; G11C5/14
摘要:
A power management method for use in a computer system having a processor, a power management module and a phase lock loop circuit (PLL) is provided. The power management module is coupled to a plurality of peripheral modules and the computer system and the processor are capable of being operated in a working state and power saving states. The method includes the following. When the computer system is operated in the working state and the processor is entered into a lowest power consumption state among the power saving states, states of the peripheral modules are detected to determine whether a specific condition has been matched. If the specific condition is matched, the processor is directed to a control state to control the PLL according to a control state configuration.