发明授权
- 专利标题: Method for thinning a wafer
- 专利标题(中): 减薄晶片的方法
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申请号: US12704695申请日: 2010-02-12
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公开(公告)号: US08252682B2公开(公告)日: 2012-08-28
- 发明人: Ku-Feng Yang , Weng-Jin Wu , Hsin-Hsien Lu , Chia-Lin Yu , Chu-Sung Shih , Fu-Chi Hsu , Shau-Lin Shue
- 申请人: Ku-Feng Yang , Weng-Jin Wu , Hsin-Hsien Lu , Chia-Lin Yu , Chu-Sung Shih , Fu-Chi Hsu , Shau-Lin Shue
- 申请人地址: TW
- 专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址: TW
- 代理机构: Lowe Hauptman Ham & Berner, LLP
- 主分类号: H01L21/44
- IPC分类号: H01L21/44 ; H01L23/48
摘要:
A method for thinning a wafer is provided. In one embodiment, a wafer is provided having a plurality of semiconductor chips, the wafer having a first side and a second side opposite the first side, wherein each of the chips includes a set of through silicon vias (TSVs), each of the TSVs substantially sealed by a liner layer and a barrier layer. A wafer carrier is provided for attaching to the second side of the wafer. The first side of the wafer is thinned and thereafer recessed to partially expose portions of the liner layers, barrier layers and the TSVs protruding from the wafer. An isolation layer is deposited over the first side of the wafer and the top portions of the liner layers, barrier layers and the TSVs. Thereafter, an insulation layer is deposited over the isolation layer. The insulation layer is then planarized to expose top portions of the TSVs. A dielectric layer is deposited over the planarized first side of the wafer. One or more electrical contacts are formed in the dielectric layer for electrical connection to the exposed one or more TSVs.
公开/授权文献
- US20110198721A1 METHOD FOR THINNING A WAFER 公开/授权日:2011-08-18
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