Invention Grant
US08258759B2 Anti-islanding for grid-tie inverter using covariance estimation and logic decision maker
有权
使用协方差估计和逻辑决策者的并联逆变器的反孤岛
- Patent Title: Anti-islanding for grid-tie inverter using covariance estimation and logic decision maker
- Patent Title (中): 使用协方差估计和逻辑决策者的并联逆变器的反孤岛
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Application No.: US12699652Application Date: 2010-02-03
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Publication No.: US08258759B2Publication Date: 2012-09-04
- Inventor: Jun Yin , Chi-Sheng Fan , Djordje Garabandic
- Applicant: Jun Yin , Chi-Sheng Fan , Djordje Garabandic
- Applicant Address: US CA Livermore
- Assignee: Xantrex Technology Inc.
- Current Assignee: Xantrex Technology Inc.
- Current Assignee Address: US CA Livermore
- Agency: Nixon Peabody LLP
- Main IPC: H02P11/00
- IPC: H02P11/00 ; H02P9/00 ; H02H7/06

Abstract:
An anti-islanding implementation that introduces a small, continuously varying phase shift pattern in the output current of an inverter. In grid-connected mode, this phase shift pattern has no impact on the frequency of the inverter's output voltage. However, when islanded, the phase shift will cause the voltage frequency to deviate from nominal. Changes in the output current phase thus correlate well with the voltage frequency, so a covariance index is used to detect an islanding configuration. When this index exceeds a threshold, a larger phase shift pattern is introduced in the output current, large enough to cause the voltage frequency to fall outside the inverter's trip protection window without compromising the inverter's power quality yet ensuring reliable tripping of the inverter.
Public/Granted literature
- US20110187200A1 ANTI-ISLANDING FOR GRID-TIE INVERTER USING COVARIANCE ESTIMATION AND LOGIC DECISION MAKER Public/Granted day:2011-08-04
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