Invention Grant
US08266552B2 Pattern generating method, method of manufacturing semiconductor device, and recording medium 有权
图案生成方法,制造半导体器件的方法和记录介质

Pattern generating method, method of manufacturing semiconductor device, and recording medium
Abstract:
Pattern formation simulations are performed based on design layout data subjected to OPC processing with a plurality of process parameters set in process conditions. A worst condition of the process conditions is calculated based on risk points extracted from simulation results. The design layout data or the OPC processing is changed such that when a pattern is formed under the worst condition based on the changed design layout data or the changed OPC processing a number of the risk points or a risk degree of the risk points of the pattern is smaller than the simulation result.
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