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    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    1.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
    半导体器件及其制造方法

    公开(公告)号：US20120241834A1

    公开(公告)日：2012-09-27

    申请号：US13234052

    申请日：2011-09-15

    申请人： Fumiharu Nakajima ,  Toshiya Kotani ,  Hiromitsu Mashita ,  Takafumi Taguchi ,  Ryota Aburada ,  Chikaaki Kodama

    发明人： Fumiharu Nakajima ,  Toshiya Kotani ,  Hiromitsu Mashita ,  Takafumi Taguchi ,  Ryota Aburada ,  Chikaaki Kodama

    IPC分类号： H01L27/088 ,  H01L21/768

    CPC分类号： H01L23/5226 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/768 ,  H01L21/76816 ,  H01L27/0688 ,  H01L27/11524 ,  H01L27/11551 ,  H01L27/1157 ,  H01L27/11578

    摘要： According to one embodiment, a semiconductor device includes interconnects extending from a element formation area to the drawing area, and connected with semiconductor elements in the element formation area and connected with contacts in the drawing area. The interconnects are formed based on a pattern of a (n+1)th second sidewall film matching a pattern of a nth (where n is an integer of 1 or more) first sidewall film on a lateral surface of a sacrificial layer. A first dimension matching an interconnect width of the interconnects and an interconnects interval in the element formation area is (k1/2n)×(λ/NA) or less when an exposure wavelength of an exposure device is λ, a numerical aperture of a lens of the exposure device is NA and a process parameter is k1. A second dimension matching an interconnect interval in the drawing area is greater than the first dimension.

    摘要翻译： 根据一个实施例，半导体器件包括从元件形成区域延伸到绘图区域并且与元件形成区域中的半导体元件连接并且与绘图区域中的触点连接的互连。 基于在牺牲层的侧表面上匹配第n个（其中n是1或更大的整数）的第一侧壁膜的图案的第（n + 1）第二侧壁膜的图案形成互连。 当曝光装置的曝光波长为λ时，在元件形成区域中匹配互连的互连宽度的第一尺寸和元件形成区域中的互连间隔为（k1 / 2n）×（λ/ NA）或更小，透镜的数值孔径 的曝光装置为NA，处理参数为k1。 在绘图区域中匹配互连间隔的第二维大于第一维度。

    Pattern correcting method, mask forming method, and method of manufacturing semiconductor device
    6.
    发明授权
    Pattern correcting method, mask forming method, and method of manufacturing semiconductor device 有权
    图案校正方法，掩模形成方法和制造半导体器件的方法

    公开(公告)号：US08443310B2

    公开(公告)日：2013-05-14

    申请号：US13237435

    申请日：2011-09-20

    申请人： Masanari Kajiwara ,  Toshiya Kotani ,  Sachiko Kobayashi ,  Hiromitsu Mashita ,  Fumiharu Nakajima

    发明人： Masanari Kajiwara ,  Toshiya Kotani ,  Sachiko Kobayashi ,  Hiromitsu Mashita ,  Fumiharu Nakajima

    IPC分类号： G06F17/50

    CPC分类号： G03F1/36 ,  G03F1/70 ,  G03F7/70441

    摘要： A pattern correcting method of an embodiment computes a distribution of pattern coverages on a design layout of a circuit pattern in the vicinity of a position that becomes an error pattern in a case where an on-substrate pattern is formed. Then, an area on the design layout in which a difference in the distribution of the pattern coverages becomes small by adding an addition pattern is set as an addition area. Next, addition pattern candidates to be added to the addition area are generated, an addition pattern to be added to the design layout is selected from the candidates on the basis of a predetermined selection criterion, and the addition pattern is added to the addition area.

    摘要翻译： 实施例的图案校正方法在形成有衬底图案的情况下，在成为误差图案的位置附近的电路图案的设计布局上计算图案覆盖率的分布。 然后，通过添加加法图案，设置图案覆盖物的分布差异变小的设计布局上的区域作为附加区域。 接下来，生成要添加到相加区域的添加模式候选，并根据预定的选择标准从候选中选择要添加到设计布局的添加模式，并将添加模式添加到添加区域。

    Pattern generation method, computer-readable recording medium, and semiconductor device manufacturing method
    7.
    发明授权
    Pattern generation method, computer-readable recording medium, and semiconductor device manufacturing method 有权
    图案生成方法，计算机可读记录介质和半导体器件制造方法

    公开(公告)号：US08347241B2

    公开(公告)日：2013-01-01

    申请号：US12354119

    申请日：2009-01-15

    申请人： Fumiharu Nakajima ,  Toshiya Kotani ,  Hiromitsu Mashita ,  Chikaaki Kodama

    发明人： Fumiharu Nakajima ,  Toshiya Kotani ,  Hiromitsu Mashita ,  Chikaaki Kodama

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5068 ,  G03F1/36

    摘要： A pattern generation method includes: acquiring a first design constraint for first patterns to be formed on a process target film by a first process, the first design constraint using, as indices, a pattern width of an arbitrary one of the first patterns, and a space between the arbitrary pattern and a pattern adjacent to the arbitrary pattern; correcting the first design constraint in accordance with pattern conversion by the second process, and thereby acquiring a second design constraint for the second pattern which uses, as indices, two patterns on both sides of a predetermined pattern space of the second pattern; judging whether the design pattern fulfils the second design constraint; and changing the design pattern so as to correspond to a value allowed by the second design constraint when the design constraint is not fulfilled.

    摘要翻译： 图案生成方法包括：通过第一处理获取要在过程目标胶片上形成的第一图案的第一设计约束，所述第一设计约束使用作为所述第一图案中的任意一个的图案宽度的索引，以及 任意图案之间的空间和与任意图案相邻的图案; 根据第二处理的图案转换来校正第一设计约束，从而获得第二图案的第二设计约束，该第二图案使用在第二图案的预定图案空间的两侧上的两个图案作为索引; 判断设计模式是否符合第二设计约束; 并且当不满足设计约束时，改变设计模式以对应于由第二设计约束允许的值。