发明授权
- 专利标题： Flash memory array system including a top gate memory cell
- 专利标题（中）： 包括顶栅存储单元的闪存阵列系统
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申请号： US12962343申请日： 2010-12-07
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公开(公告)号： US08270213B2公开(公告)日： 2012-09-18
- 发明人: Hieu Van Tran , Hung Quoc Nguyen , Anh Ly , Sheng-Hsiung Hsueh , Sang Thanh Nguyen , Loc B. Hoang , Steve Choi , Thuan T. Vu
- 申请人： Hieu Van Tran , Hung Quoc Nguyen , Anh Ly , Sheng-Hsiung Hsueh , Sang Thanh Nguyen , Loc B. Hoang , Steve Choi , Thuan T. Vu
- 申请人地址： US CA San Jose
- 专利权人： Silicon Storage Technology, Inc.
- 当前专利权人： Silicon Storage Technology, Inc.
- 当前专利权人地址： US CA San Jose
- 代理机构： DLA Piper LLP (US)
- 主分类号： G11C16/12
- IPC分类号： G11C16/12
摘要：
A memory system includes memory cells arranged in sectors. A decoder corresponding to a sector disables memory cells having a defective top gate. The decoder may include a low voltage or high voltage latch for the disabling. A top gate handling algorithm is included. The memory system may include dynamic top gate coupling. A programming algorithm and waveforms with top gate handling is included.