Invention Grant
- Patent Title: Semiconductor integrated circuit device and related fabrication method
- Patent Title (中): 半导体集成电路器件及相关制造方法
-
Application No.: US12793809Application Date: 2010-06-04
-
Publication No.: US08273620B2Publication Date: 2012-09-25
- Inventor: Jin-bum Kim , Young-pil Kim , Si-young Choi , Byeong-chan Lee , Jong-wook Lee
- Applicant: Jin-bum Kim , Young-pil Kim , Si-young Choi , Byeong-chan Lee , Jong-wook Lee
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Volentine & Whitt, PLLC
- Priority: KR10-2006-0108392 20061103
- Main IPC: H01L21/8234
- IPC: H01L21/8234

Abstract:
Embodiments of the invention provide a semiconductor integrated circuit device and a method for fabricating the device. The semiconductor device includes a semiconductor substrate having a cell region and a peripheral region, a cell active region formed in the cell region, and a peripheral active region formed in the peripheral region, wherein the cell active region and the peripheral active region are defined by isolation regions. The semiconductor device further includes a first gate stack formed on the cell active region, a second gate stack formed on the peripheral active region, a cell epitaxial layer formed on an exposed portion of the cell active region, and a peripheral epitaxial layer formed on an exposed portion of the peripheral active region, wherein the height of the peripheral epitaxial layer is greater than the height of the cell epitaxial layer.
Public/Granted literature
- US20100240197A1 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND RELATED FABRICATION METHOD Public/Granted day:2010-09-23
Information query
IPC分类: