Invention Grant
- Patent Title: Power measurement techniques of a system-on-chip (SOC)
- Patent Title (中): 片上系统(SOC)的功率测量技术
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Application No.: US12557263Application Date: 2009-09-10
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Publication No.: US08275560B2Publication Date: 2012-09-25
- Inventor: Sivakumar Radhakrishnan , Sin S. Tan , Stephan J. Jourdan , Lily P. Looi , Yi-Feng Liu
- Applicant: Sivakumar Radhakrishnan , Sin S. Tan , Stephan J. Jourdan , Lily P. Looi , Yi-Feng Liu
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: G01R15/00
- IPC: G01R15/00 ; G01R19/00 ; G01R21/00 ; G06F1/00

Abstract:
A method and system to enable power measurements of a system-on-chip in various modes. In one embodiment of the invention, the system-on-chip has full controllability of its logic and circuitry to facilitate configuration of the system-on-chip into a desired mode of operation. This allows hooks or interfaces to access the system-on-chip externally for measurements. For example, in one embodiment of the invention, the hooks in the system-on-chip allow a backend tester to configure the system-on-chip into various modes easily to perform power consumption measurements of one or more individual components of the system-on-chip. The power consumption measurement of the individual components in the system-on-chip can be performed faster and can be more accurate. In addition, the overall yield of the SOC can be increased as it is easier to detect failure parts.
Public/Granted literature
- US20110060931A1 POWER MEASUREMENT TECHNIQUES OF A SYSTEM-ON-CHIP (SOC) Public/Granted day:2011-03-10
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