发明授权
- 专利标题： Verification of logic core implementation
- 专利标题（中）： 验证逻辑核心实现
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申请号： US13004183申请日： 2011-01-11
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公开(公告)号： US08286113B1公开(公告)日： 2012-10-09
- 发明人: Brendan K. Bridgford , Jason J. Moore , W. Story Leavesley, III , Derrick S. Woods
- 申请人： Brendan K. Bridgford , Jason J. Moore , W. Story Leavesley, III , Derrick S. Woods
- 申请人地址： US CA San Jose
- 专利权人： Xilinx, Inc.
- 当前专利权人： Xilinx, Inc.
- 当前专利权人地址： US CA San Jose
- 代理商 LeRoy D. Maunu; Lois D. Cartier
- 主分类号： G06F17/50
- IPC分类号： G06F17/50 ; G06F15/177 ; G06F9/00
摘要：
A system and method are provided for verifying implementation of a logic core in a complete bitstream. A logic core bitstream is extracted from the complete bitstream. The logic core bitstream is compared to a reference bitstream of the logic core for a target device. In response to no discrepancy in the comparison of the logic core bitstream and the reference bitstream, a data value is stored indicating that the logic core implementation contained in the complete bitstream is verified.
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