Invention Grant
- Patent Title: Method for fabrication of a semiconductor device and structure
- Patent Title (中): 半导体器件和结构的制造方法
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Application No.: US13041404Application Date: 2011-03-06
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Publication No.: US08298875B1Publication Date: 2012-10-30
- Inventor: Zvi Or-Bach , Deepak C. Sekar , Brian Cronquist , Paul Lim
- Applicant: Zvi Or-Bach , Deepak C. Sekar , Brian Cronquist , Paul Lim
- Applicant Address: US CA San Jose
- Assignee: Monolithic 3D Inc.
- Current Assignee: Monolithic 3D Inc.
- Current Assignee Address: US CA San Jose
- Agency: Tran & Associates
- Main IPC: H01L21/20
- IPC: H01L21/20
Abstract:
A method to fabricate a junction-less transistor comprising: forming at least two regions of semiconductor doping; first region with a relatively high level of dopant concentration and second region with at least 1/10 lower dopant concentration, and etching away a portion of said first region for the formation of the transistor gate.
Information query
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