Invention Grant
- Patent Title: Digital phase-locked loops and frequency adjusting methods thereof
- Patent Title (中): 数字锁相环及其频率调整方法
-
Application No.: US12729308Application Date: 2010-03-23
-
Publication No.: US08325870B2Publication Date: 2012-12-04
- Inventor: Tse-Peng Chen
- Applicant: Tse-Peng Chen
- Applicant Address: TW Taipei
- Assignee: Richwave Technology Corp.
- Current Assignee: Richwave Technology Corp.
- Current Assignee Address: TW Taipei
- Agency: McClure, Qualey & Rodack LLP
- Priority: TW98132046A 20090923
- Main IPC: H03L7/08
- IPC: H03L7/08 ; H03D3/24

Abstract:
A digital phase-locked loop having a phase frequency detector (PFD), a 3-state phase frequency detection converter (3-state PFD converter), a loop filter and a digital voltage-controlled oscillator is provided. The PFD receives an input frequency and a reference frequency and outputs a first signal and a second signal based on the phase difference between the input frequency and the reference frequency. The 3-state PFD converter outputs a 3-state signal according to the first and second signals, wherein the 3-state signal is presented in 1, 0 and −1. The loop filter outputs at least one control bit based on only the 3-state signal. The DCO adjusts the outputted oscillation frequency according to the control bit.
Public/Granted literature
- US20110069792A1 DIGITAL PHASE-LOCKED LOOPS AND FREQUENCY ADJUSTING METHODS THEREOF Public/Granted day:2011-03-24
Information query