An array of logic devices capable of self-determining the program, inputs and outputs from configuration information provided by its nearest neighbors. The rules used by each device to self-determine its behavior are identical to those of every other device in the array. This facilitates the development of robust array configurations and robust behavior of the device as a whole. This system's logic devices utilize three shift-registers, two are programmed before operation, the third is programmed on-the-fly by the other two. This facilitates a fast response to changes in the performance of the array in the event of partial dynamic or static failures of the array. An iterative design algorithm for the array ensures optimum use of the resources of the array.