Invention Grant
- Patent Title: Semiconductor package structure and fabricating method of semiconductor package structure
- Patent Title (中): 半导体封装结构和半导体封装结构的制造方法
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Application No.: US12915514Application Date: 2010-10-29
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Publication No.: US08390013B2Publication Date: 2013-03-05
- Inventor: Tzyy-Jang Tseng , Chin-Sheng Wang , Chih-Hong Chuang
- Applicant: Tzyy-Jang Tseng , Chin-Sheng Wang , Chih-Hong Chuang
- Applicant Address: TW Hsinchu
- Assignee: Subtron Technology Co., Ltd.
- Current Assignee: Subtron Technology Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: J.C. Patents
- Priority: TW99122521A 20100708
- Main IPC: H01L33/00
- IPC: H01L33/00

Abstract:
A semiconductor package structure includes a dielectric layer, a patterned metal layer, a carrier, a metal layer and a semiconductor die. The dielectric layer has a first surface, a second surface and an opening. The patterned metal layer is disposed on the first surface. The carrier is disposed at the second surface and has a third surface, a fourth surface and at least a through hole. A portion of the third surface and the through hole are exposed by the opening. The metal layer is disposed on the fourth surface and has a containing cavity and at least a heat conductive post extending from the fourth surface and disposed in the through hole. An end of the heat conductive post protrudes away from the third surface, and the containing cavity is located on the end of the heat conductive post. The semiconductor die is located in the containing cavity.
Public/Granted literature
- US20120007252A1 SEMICONDUCTOR PACKAGE STRUCTURE AND FABRICATING METHOD OF SEMICONDUCTOR PACKAGE STRUCTURE Public/Granted day:2012-01-12
Information query
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