公开(公告)号：US09603263B2

公开(公告)日：2017-03-21

申请号：US13552654

申请日：2012-07-19

Applicant: Chih-Hong Chuang ,  Tzu-Wei Huang

Inventor： Chih-Hong Chuang ,  Tzu-Wei Huang

IPC: H05K3/00 ,  H05K3/42

CPC classification number: H05K3/427 ,  H05K3/0097 ,  H05K2201/09509 ,  H05K2201/096 ,  H05K2203/0228 ,  H05K2203/1536 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49156

Abstract: A manufacturing method of a circuit substrate includes the following steps. The peripheries of two metal layers are bonded to form a sealed area. At least a through hole passing through the sealed area is formed. Two insulating layers are formed on the two metal layers. Two conductive layers are formed on the two insulating layers. The two insulating layers and the two conductive layers are laminated to the two metal layers bonded to each other, wherein the metal layers are embedded between the two insulating layers, and the two insulating layers fill into the through hole. The sealed area of the two metal layers is separated to form two separated circuit substrates. Therefore, the thinner substrate can be operated in the following steps, such as patterning process or plating process. In addition, the method may be extended to manufacture the circuit substrate with odd-numbered layer or even-numbered layer.

公开(公告)号：US20120181066A1

公开(公告)日：2012-07-19

申请号：US13037377

申请日：2011-03-01

Applicant: Chih-Hong Chuang

Inventor： Chih-Hong Chuang

IPC: H05K7/20

CPC classification number: H01L23/3735 ,  H01L23/13 ,  H01L23/3731 ,  H01L23/3736 ,  H01L33/641 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/01322 ,  H01L2924/1815 ,  H05K1/05 ,  H05K3/445 ,  H05K2201/068 ,  H05K2201/09745 ,  H05K2203/0323 ,  H05K2203/0369 ,  H01L2924/00

Abstract: A package carrier is suitable for carrying a heat-generating element. The package carrier includes a substrate, an insulating structure with high thermal conductivity, and a patterned conductive layer. The substrate has a surface. The insulating structure with high thermal conductivity is configured on a portion of the surface of the substrate. The patterned conductive layer is configured on a portion of the surface of substrate, and a portion of the patterned conductive layer covers the insulating structure with high thermal conductivity. The heat-generating element is suitable for being configured on the portion of the patterned conductive layer which is located on the insulating structure with high thermal conductivity. A coefficient of thermal expansion (CTE) of the insulating structure with high thermal conductivity is between a CTE of the substrate and a CTE of the heat-generating element.

Abstract translation: 包装载体适用于承载发热元件。 封装载体包括衬底，具有高导热性的绝缘结构和图案化导电层。 基板具有表面。 具有高导热性的绝缘结构构造在基板表面的一部分上。 图案化导电层配置在基板表面的一部分上，并且图案化导电层的一部分覆盖具有高导热性的绝缘结构。 发热元件适合于构造在图案化导电层的位于具有高导热性的绝缘结构上的部分上。 具有高热导率的绝缘结构的热膨胀系数（CTE）在基板的CTE和发热元件的CTE之间。

公开(公告)号：US20120279630A1

公开(公告)日：2012-11-08

申请号：US13552654

申请日：2012-07-19

Applicant: Chih-Hong Chuang ,  Tzu-Wei Huang

Inventor： Chih-Hong Chuang ,  Tzu-Wei Huang

IPC: H01B13/34

CPC classification number: H05K3/427 ,  H05K3/0097 ,  H05K2201/09509 ,  H05K2201/096 ,  H05K2203/0228 ,  H05K2203/1536 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49156

Abstract: A manufacturing method of a circuit substrate includes the following steps. The peripheries of two metal layers are bonded to form a sealed area. At least a through hole passing through the sealed area is formed. Two insulating layers are formed on the two metal layers. Two conductive layers are formed on the two insulating layers. The two insulating layers and the two conductive layers are laminated to the two metal layers bonded to each other, wherein the metal layers are embedded between the two insulating layers, and the two insulating layers fill into the through hole. The sealed area of the two metal layers is separated to form two separated circuit substrates. Therefore, the thinner substrate can be operated in the following steps, such as patterning process or plating process. In addition, the method may be extended to manufacture the circuit substrate with odd-numbered layer or even-numbered layer.

Abstract translation: 电路基板的制造方法包括以下步骤。 两个金属层的周边结合形成密封区域。 至少形成通过密封区域的通孔。 在两个金属层上形成两个绝缘层。 在两个绝缘层上形成两个导电层。 将两个绝缘层和两个导电层层压到彼此接合的两个金属层上，其中金属层嵌入在两个绝缘层之间，并且两个绝缘层填充到通孔中。 两个金属层的密封区域被分离以形成两个分开的电路基板。 因此，可以在以下步骤中操作较薄的衬底，例如图案化工艺或电镀工艺。 此外，该方法可以扩展为制造具有奇数层或偶数层的电路基板。

公开(公告)号：US20110154658A1

公开(公告)日：2011-06-30

申请号：US12979334

申请日：2010-12-28

Applicant: Chih-Hong Chuang ,  Tzu-Wei Huang

Inventor： Chih-Hong Chuang ,  Tzu-Wei Huang

IPC: H05K3/00

CPC classification number: H05K3/427 ,  H05K3/0097 ,  H05K2201/09509 ,  H05K2201/096 ,  H05K2203/0228 ,  H05K2203/1536 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49156

Abstract: A manufacturing method of a circuit substrate includes the following steps. The peripheries of two metal layers are bonded to form a sealed area. At least a through hole passing through the sealed area is formed. Two insulating layers are formed on the two metal layers. Two conductive layers are formed on the two insulating layers. The two insulating layers and the two conductive layers are laminated to the two metal layers bonded to each other, wherein the metal layers are embedded between the two insulating layers, and the two insulating layers fill into the through hole. The sealed area of the two metal layers is separated to form two separated circuit substrates. Therefore, the thinner substrate can be operated in the following steps, such as patterning process or plating process. In addition, the method may be extended to manufacture the circuit substrate with odd-numbered layer or even-numbered layer.

Abstract translation: 电路基板的制造方法包括以下步骤。 两个金属层的周边结合形成密封区域。 至少形成通过密封区域的通孔。 在两个金属层上形成两个绝缘层。 在两个绝缘层上形成两个导电层。 将两个绝缘层和两个导电层层压到彼此接合的两个金属层上，其中金属层嵌入在两个绝缘层之间，并且两个绝缘层填充到通孔中。 两个金属层的密封区域被分离以形成两个分开的电路基板。 因此，可以在以下步骤中操作较薄的衬底，例如图案化工艺或电镀工艺。 此外，该方法可以扩展为制造具有奇数层或偶数层的电路基板。

公开(公告)号：US20110154657A1

公开(公告)日：2011-06-30

申请号：US12725641

申请日：2010-03-17

Applicant: Chih-Hong Chuang ,  Tzu-Wei Huang

Inventor： Chih-Hong Chuang ,  Tzu-Wei Huang

IPC: H05K3/00

CPC classification number: H05K3/0097 ,  H05K3/427 ,  H05K2201/09509 ,  H05K2201/096 ,  H05K2203/1536 ,  Y10T29/49124 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49146 ,  Y10T29/49169 ,  Y10T29/49176

Abstract: A manufacturing method of package carrier is provided. A first copper foil layer, a second copper foil layer on the first foil layer, a third copper foil layer and a fourth foil layer on the third foil layer are provided. The second copper foil layer is partially bonded the fourth copper foil layer by an adhesive gel so as to form a substrate of which the peripheral region is glued and the effective region is not glued. Therefore, the thinner substrate can be used in the following steps, such as patterning process or plating process. In addition, the substrate can be extended be the package carrier structure with odd-numbered layer or even-numbered layer.

Abstract translation: 提供一种封装载体的制造方法。 提供第一铜箔层，第一箔层上的第二铜箔层，第三箔层上的第三铜箔层和第四箔层。 第二铜箔层通过粘合剂凝胶部分地接合第四铜箔层，以形成周边区域被胶合并且有效区域不胶合的基板。 因此，较薄的基板可以在以下步骤中使用，例如图案化工艺或电镀工艺。 此外，衬底可以扩展为具有奇数层或偶数层的封装载体结构。

公开(公告)号：US20150136364A1

公开(公告)日：2015-05-21

申请号：US14153096

申请日：2014-01-13

Applicant: Chih-Hong Chuang

Inventor： Chih-Hong Chuang

IPC: H01L33/64

CPC classification number: H01L33/648 ,  F21V29/51 ,  H01L23/427 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A heat dissipation device includes a package carrier, heat dissipating fins, an atomizer and a driving unit. The package carrier has a carrying surface and a disposing surface divided into a first region and a second region. The heat dissipating fines are located in the second region and define an accommodating space with the package carrier. An extending direction of the heat dissipating fines is perpendicular to an extending direction of the package carrier. The atomizer is disposed on the heat dissipating fines and located in the accommodating space. The atomizer includes an atomization unit, a liquid containing cavity and a fluid channel. The liquid containing cavity, the heat dissipating fines and the package carrier define a fluid chamber. The driving unit is electrically connected to the atomizer so as to drive a working fluid to the atomization unit and atomize the working fluid into an atomization micro-mist.

Abstract translation: 散热装置包括封装载体，散热片，雾化器和驱动单元。 封装载体具有承载表面和分为第一区域和第二区域的布置表面。 散热细粒位于第二区域中并且与包装载体形成容纳空间。 散热细粒的延伸方向垂直于包装载体的延伸方向。 雾化器设置在散热细粒上并且位于容纳空间中。 雾化器包括雾化单元，液体容纳腔和流体通道。 液体容纳腔，散热细粒和包装载体限定流体室。 驱动单元电连接到雾化器，以将工作流体驱动到雾化单元并将工作流体雾化成雾化微雾。

公开(公告)号：US08510936B2

公开(公告)日：2013-08-20

申请号：US12725641

申请日：2010-03-17

Applicant: Chih-Hong Chuang ,  Tzu-Wei Huang

Inventor： Chih-Hong Chuang ,  Tzu-Wei Huang

IPC: H05K3/30

CPC classification number: H05K3/0097 ,  H05K3/427 ,  H05K2201/09509 ,  H05K2201/096 ,  H05K2203/1536 ,  Y10T29/49124 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49146 ,  Y10T29/49169 ,  Y10T29/49176

Abstract: A manufacturing method of package carrier is provided. A first copper foil layer, a second copper foil layer on the first foil layer, a third copper foil layer and a fourth foil layer on the third foil layer are provided. The second copper foil layer is partially bonded the fourth copper foil layer by an adhesive gel so as to form a substrate of which the peripheral region is glued and the effective region is not glued. Therefore, the thinner substrate can be used in the following steps, such as patterning process or plating process. In addition, the substrate can be extended be the package carrier structure with odd-numbered layer or even-numbered layer.

Abstract translation: 提供一种封装载体的制造方法。 提供第一铜箔层，第一箔层上的第二铜箔层，第三箔层上的第三铜箔层和第四箔层。 第二铜箔层通过粘合剂凝胶部分地接合第四铜箔层，以形成周边区域被胶合并且有效区域不胶合的基板。 因此，较薄的基板可以在以下步骤中使用，例如图案化工艺或电镀工艺。 此外，衬底可以扩展为具有奇数层或偶数层的封装载体结构。

公开(公告)号：US08563363B2

公开(公告)日：2013-10-22

申请号：US13590847

申请日：2012-08-21

Applicant: Tzyy-Jang Tseng ,  Chin-Sheng Wang ,  Chih-Hong Chuang

Inventor： Tzyy-Jang Tseng ,  Chin-Sheng Wang ,  Chih-Hong Chuang

IPC: H01L21/00

CPC classification number: H01L23/498 ,  H01L23/13 ,  H01L23/3677 ,  H01L23/3731 ,  H01L23/3732 ,  H01L23/562 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/83001 ,  H01L2224/92247 ,  H01L2924/01019 ,  H01L2924/12042 ,  H01L2924/351 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A fabricating method of a semiconductor package structure is provided. A dielectric layer having a first surface and a second surface is provided. A patterned metal layer has been formed on the first surface of the dielectric layer. An opening going through the first and the second surfaces is formed. A carrier having a third surface and a fourth surface is formed at the second surface. A portion of the third surface is exposed by the opening of the dielectric layer. A semiconductor die having a joining surface and a side-surface is joined in the opening. At least a through hole going through the third and the fourth surfaces is formed. A metal layer having at least a heat conductive post extending from the fourth surface of the carrier to the through hole and disposed in the through hole and a containing cavity is formed on the fourth surface.

Abstract translation: 提供一种半导体封装结构的制造方法。 提供具有第一表面和第二表面的电介质层。 已经在介电层的第一表面上形成图案化的金属层。 形成穿过第一和第二表面的开口。 具有第三表面和第四表面的载体形成在第二表面。 第三表面的一部分被电介质层的开口暴露。 具有接合表面和侧表面的半导体管芯连接在开口中。 至少形成穿过第三和第四表面的通孔。 至少具有从载体的第四表面延伸到通孔并且设置在通孔中的导热柱和在第四表面上形成容纳腔的金属层。

公开(公告)号：US08390013B2

公开(公告)日：2013-03-05

申请号：US12915514

申请日：2010-10-29

Applicant: Tzyy-Jang Tseng ,  Chin-Sheng Wang ,  Chih-Hong Chuang

Inventor： Tzyy-Jang Tseng ,  Chin-Sheng Wang ,  Chih-Hong Chuang

IPC: H01L33/00

CPC classification number: H01L23/498 ,  H01L23/13 ,  H01L23/3677 ,  H01L23/3731 ,  H01L23/3732 ,  H01L23/562 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/83001 ,  H01L2224/92247 ,  H01L2924/01019 ,  H01L2924/12042 ,  H01L2924/351 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A semiconductor package structure includes a dielectric layer, a patterned metal layer, a carrier, a metal layer and a semiconductor die. The dielectric layer has a first surface, a second surface and an opening. The patterned metal layer is disposed on the first surface. The carrier is disposed at the second surface and has a third surface, a fourth surface and at least a through hole. A portion of the third surface and the through hole are exposed by the opening. The metal layer is disposed on the fourth surface and has a containing cavity and at least a heat conductive post extending from the fourth surface and disposed in the through hole. An end of the heat conductive post protrudes away from the third surface, and the containing cavity is located on the end of the heat conductive post. The semiconductor die is located in the containing cavity.

Abstract translation: 半导体封装结构包括电介质层，图案化金属层，载体，金属层和半导体管芯。 电介质层具有第一表面，第二表面和开口。 图案化的金属层设置在第一表面上。 载体设置在第二表面，并具有第三表面，第四表面和至少一个通孔。 第三表面和通孔的一部分由开口露出。 金属层设置在第四表面上，并且具有容纳腔和至少从第四表面延伸并设置在通孔中的导热柱。 导热柱的端部从第三表面突出，并且容纳腔位于导热柱的端部上。 半导体管芯位于容纳腔中。

公开(公告)号：US20130011971A1

公开(公告)日：2013-01-10

申请号：US13590847

申请日：2012-08-21

Applicant: TZYY-JANG TSENG ,  Chin-Sheng Wang ,  Chih-Hong Chuang

Inventor： TZYY-JANG TSENG ,  Chin-Sheng Wang ,  Chih-Hong Chuang

IPC: H01L21/50

CPC classification number: H01L23/498 ,  H01L23/13 ,  H01L23/3677 ,  H01L23/3731 ,  H01L23/3732 ,  H01L23/562 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/83001 ,  H01L2224/92247 ,  H01L2924/01019 ,  H01L2924/12042 ,  H01L2924/351 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A fabricating method of a semiconductor package structure is provided. A dielectric layer having a first surface and a second surface is provided. A patterned metal layer has been formed on the first surface of the dielectric layer. An opening going through the first and the second surfaces is formed. A carrier having a third surface and a fourth surface is formed at the second surface. A portion of the third surface is exposed by the opening of the dielectric layer. A semiconductor die having a joining surface and a side-surface is joined in the opening. At least a through hole going through the third and the fourth surfaces is formed. A metal layer having at least a heat conductive post extending from the fourth surface of the carrier to the through hole and disposed in the through hole and a containing cavity is formed on the fourth surface.

Abstract translation: 提供一种半导体封装结构的制造方法。 提供具有第一表面和第二表面的电介质层。 已经在介电层的第一表面上形成图案化的金属层。 形成穿过第一和第二表面的开口。 具有第三表面和第四表面的载体形成在第二表面。 第三表面的一部分被电介质层的开口暴露。 具有接合表面和侧表面的半导体管芯连接在开口中。 至少形成穿过第三和第四表面的通孔。 至少具有从载体的第四表面延伸到通孔并且设置在通孔中的导热柱的金属层和在第四表面上形成容纳腔。