发明授权
US08399932B2 Semiconductor device, semiconductor integrated circuit, SRAM, and method for producing Dt-MOS transistor
有权
半导体器件，半导体集成电路，SRAM以及用于制造Dt-MOS晶体管的方法
- 专利标题： Semiconductor device, semiconductor integrated circuit, SRAM, and method for producing Dt-MOS transistor
- 专利标题（中）： 半导体器件，半导体集成电路，SRAM以及用于制造Dt-MOS晶体管的方法
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申请号： US13118918申请日： 2011-05-31
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公开(公告)号： US08399932B2公开(公告)日： 2013-03-19
- 发明人: Eiji Yoshida , Akihisa Yamaguchi
- 申请人： Eiji Yoshida , Akihisa Yamaguchi
- 申请人地址： JP Yokohama
- 专利权人： Fujitsu Semiconductor Limited
- 当前专利权人： Fujitsu Semiconductor Limited
- 当前专利权人地址： JP Yokohama
- 代理机构： Westerman, Hattori, Daniels & Adrian, LLP
- 优先权： JP2010-177443 20100806
- 主分类号： H01L21/70
- IPC分类号： H01L21/70
摘要：
A semiconductor device includes a silicon substrate; an element isolation region; an element region including a first well; a contact region; a gate electrode extending from the element region to a sub-region of the element isolation region between the element region and the contact region; a source diffusion region; a drain diffusion region; a first insulating region contacting a lower end of the source diffusion region; a second insulating region contacting a lower end of the drain diffusion region; and a via plug configured to electrically connect the gate electrode with the contact region. The first well is disposed below the gate electrode and is electrically connected with the contact region via the silicon substrate under the sub-region. The lower end of the element isolation region except the sub-region is located lower than the lower end of the first well.