发明授权
- 专利标题: Techniques for reducing duty cycle distortion in periodic signals
- 专利标题(中): 降低周期信号中占空比失真的技术
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申请号: US13083431申请日: 2011-04-08
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公开(公告)号: US08416001B2公开(公告)日: 2013-04-09
- 发明人: Weiqi Ding , Sergey Shumarayev , Wilson Wong , Tim Tri Hoang , Yanjing Ke
- 申请人: Weiqi Ding , Sergey Shumarayev , Wilson Wong , Tim Tri Hoang , Yanjing Ke
- 申请人地址: US CA San Jose
- 专利权人: Altera Corporation
- 当前专利权人: Altera Corporation
- 当前专利权人地址: US CA San Jose
- 代理商 Steven J. Cahill
- 主分类号: H03K3/017
- IPC分类号: H03K3/017 ; H03K5/04 ; H03K7/08
摘要:
A transmitter circuit is operable to provide an output signal in response to a first periodic signal. A multiplexer circuit is operable to provide a second periodic signal as a selected signal during a first phase of operation. The multiplexer circuit is operable to provide the output signal of the transmitter circuit as the selected signal during a second phase of operation. A sampler circuit is operable to generate first samples of the selected signal during the first phase of operation. The sampler circuit is operable to generate second samples of the selected signal during the second phase of operation. A duty cycle control circuit is operable to adjust a duty cycle of the first periodic signal based on the first and the second samples.
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